<_whitenotifier-b>
[glasgow] gimbas commented on issue #69: Can we get SWIM/SWD support? - https://git.io/JJtdf
<_whitenotifier-b>
[glasgow] FFY00 commented on issue #69: Can we get SWIM/SWD support? - https://git.io/JJtdT
<_whitenotifier-b>
[glasgow] gimbas commented on issue #69: Can we get SWIM/SWD support? - https://git.io/JJtdG
<d1b2>
<MattHuszagh> Is there any special setup necessary for the default selftest applet? I see the "no requirements" message in the help menu, but I want to be sure since I'm getting a fail high error for pins-int and ep6in timeout for the loopback
<whitequark>
hmm
<whitequark>
you should not be getting ep6 timeout errors
<whitequark>
that indicates a board issue
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<d1b2>
<MattHuszagh> ok. It is certainly possible i made some soldering mistakes. What does fail high mean? Does that mean shorts? Perhaps strangely, it's giving that for all IO pins (A0-A7 and B0-B7)
<whitequark>
sorry, should've mentioned
<whitequark>
pins-int issue is a bug in the selftest
<d1b2>
<MattHuszagh> No worries - thanks for the heads up.
<d1b2>
<MattHuszagh> As for the EP6IN timeout, is that a connection error between the USB lines and the cypress chip?
<d1b2>
<MattHuszagh> So I can look for shorts/opens in the right place
<d1b2>
<MattHuszagh> Can I use any of the other selftests to detect hardware issues?
<d1b2>
<MattHuszagh> Also, full disclosure I'm a little behind master, but not much. I'm using a commit from June 29
<whitequark>
between the cypress chip and the FPGA
<whitequark>
if it's a timeout then it's probably a specific line, let me check
<whitequark>
take a look at FLAGA..FLAGD and A0..1
<d1b2>
<MattHuszagh> thanks, i will
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<_whitenotifier-b>
[glasgow] classic-gentleman commented on issue #49: Implement MPSSE subtarget and FTDI emulation mode - https://git.io/JJqk8
<_whitenotifier-b>
[glasgow] whitequark commented on issue #49: Implement MPSSE subtarget and FTDI emulation mode - https://git.io/JJqk6
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<_whitenotifier-b>
[glasgow] classic-gentleman commented on issue #49: Implement MPSSE subtarget and FTDI emulation mode - https://git.io/JJqm2
<_whitenotifier-b>
[glasgow] whitequark commented on issue #49: Implement MPSSE subtarget and FTDI emulation mode - https://git.io/JJqm5
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<d1b2>
<MattHuszagh> when I run glasgow run analyzer -V3.3 dump.vcd, I get cannot set I/O port(s) AB pull resistors to low={} high={}. Is this expected?
<d1b2>
<MattHuszagh> I've tried enabling pull-ups or pull-downs, but I get a similar error
<d1b2>
<MattHuszagh> Nvm, I believe I've found a short. Will fix that and then see if I still have any issues
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<d1b2>
<MattHuszagh> Ok, I fixed the short but the problem persists