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<d1b2>
<thirtythreeforty> Thought I'd ask here because I can't really figure this out: What is the generic product name for the fly wire cable assemblies that come with Glasgow? I'm designing a scope and would like to have something similar
<d1b2>
<thirtythreeforty> Thought I'd ask here because I can't really figure this out: What is the generic product name for the fly wire cable assemblies that come with Glasgow? I'm designing a scope and would like to have something similar
<d1b2>
<thirtythreeforty> Thought I'd ask here because I can't really figure this out: What is the generic product name for the fly wire cable assemblies that come with Glasgow? I'm designing a scope and would like to have something similar
<d1b2>
<thirtythreeforty> It's not "dupont cable" as far as I can tell, because one end is 2.54mm header and the other is individual connectors
<d1b2>
<thirtythreeforty> It's not "dupont cable" as far as I can tell, because one end is 2.54mm header and the other is individual connectors
<d1b2>
<thirtythreeforty> It's not "dupont cable" as far as I can tell, because one end is 2.54mm header and the other is individual connectors
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<whitequark>
there is no such generic product, it's a custom assembly
<whitequark>
there is no such generic product, it's a custom assembly
<whitequark>
there is no such generic product, it's a custom assembly
<d1b2>
<thirtythreeforty> Aw, I was worried you'd say that. Volume production lets you have so many nice things
<d1b2>
<thirtythreeforty> Aw, I was worried you'd say that. Volume production lets you have so many nice things
<d1b2>
<thirtythreeforty> Aw, I was worried you'd say that. Volume production lets you have so many nice things
<d1b2>
<thirtythreeforty> Ha I had no idea Dirty did cable assemblies. I need to browse their site some more!
<d1b2>
<thirtythreeforty> Ha I had no idea Dirty did cable assemblies. I need to browse their site some more!
<d1b2>
<thirtythreeforty> Ha I had no idea Dirty did cable assemblies. I need to browse their site some more!
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<d1b2>
<tnt> @thirtythreeforty you can also buy pre crimped cable in various length / color but without the shroud/housing and then buy housing in the dimensions / pincount you want (down to single pin) and then make cables yourself quickly.
<d1b2>
<tnt> @thirtythreeforty you can also buy pre crimped cable in various length / color but without the shroud/housing and then buy housing in the dimensions / pincount you want (down to single pin) and then make cables yourself quickly.
<d1b2>
<tnt> @thirtythreeforty you can also buy pre crimped cable in various length / color but without the shroud/housing and then buy housing in the dimensions / pincount you want (down to single pin) and then make cables yourself quickly.
<whitequark[m]>
ohhh that's nice to know
<whitequark[m]>
ohhh that's nice to know
<whitequark[m]>
ohhh that's nice to know
<whitequark[m]>
where?
<whitequark[m]>
where?
<whitequark[m]>
where?
<d1b2>
<thirtythreeforty> I too would like to know this. Does it involve elaborate crimp tools?
<d1b2>
<thirtythreeforty> I too would like to know this. Does it involve elaborate crimp tools?
<d1b2>
<thirtythreeforty> I too would like to know this. Does it involve elaborate crimp tools?
<whitequark[m]>
"pre crimped"
<whitequark[m]>
"pre crimped"
<whitequark[m]>
"pre crimped"
<d1b2>
<thirtythreeforty> Hm fair point, I was misunderstanding. I guess you shove the crimped pins into the plastic yourself. Yes, sounds perfect
<d1b2>
<thirtythreeforty> Hm fair point, I was misunderstanding. I guess you shove the crimped pins into the plastic yourself. Yes, sounds perfect
<d1b2>
<thirtythreeforty> Hm fair point, I was misunderstanding. I guess you shove the crimped pins into the plastic yourself. Yes, sounds perfect
<jpa->
yeah, that's an option also - though i prefer the silicone wires and i haven't found them pre-crimped without the shell yet; separating the shell from one end is pretty quick though
<jpa->
yeah, that's an option also - though i prefer the silicone wires and i haven't found them pre-crimped without the shell yet; separating the shell from one end is pretty quick though
<jpa->
yeah, that's an option also - though i prefer the silicone wires and i haven't found them pre-crimped without the shell yet; separating the shell from one end is pretty quick though
<d1b2>
<cfy_yfc> I tested the I/O with up to 100 MHz square but the resulting signal measured with a Rigol PVP2350 probe and MSO5000 was not that great; the probe was set to 1:10 (good for up to 350MHz) and the output measured directly at the I/O pin ... the standard GND clip was used (so not the best way to do it); I will double check with a higher-quality scope and probe with suitable 'GND-antenna-pin-attachment' at work later this week (just so as to rule out the
<d1b2>
<cfy_yfc> I tested the I/O with up to 100 MHz square but the resulting signal measured with a Rigol PVP2350 probe and MSO5000 was not that great; the probe was set to 1:10 (good for up to 350MHz) and the output measured directly at the I/O pin ... the standard GND clip was used (so not the best way to do it); I will double check with a higher-quality scope and probe with suitable 'GND-antenna-pin-attachment' at work later this week (just so as to rule out the
<d1b2>
<cfy_yfc> I tested the I/O with up to 100 MHz square but the resulting signal measured with a Rigol PVP2350 probe and MSO5000 was not that great; the probe was set to 1:10 (good for up to 350MHz) and the output measured directly at the I/O pin ... the standard GND clip was used (so not the best way to do it); I will double check with a higher-quality scope and probe with suitable 'GND-antenna-pin-attachment' at work later this week (just so as to rule out the
<d1b2>
typical Rigol flaws) this is probably not totally surprising, as a 100 MHz square with sharp rise/fall time would have substantial frequency components above 100 MHz, too -- still, I'm wondering if it would be possible to somehow get 100 MHz out of the I/O and what the limiting factors are; is it the connector? is it the I/O pin? is it the routing or layer stackup? for anything >50 MHz would I need to provide R-series and proper termination?
<d1b2>
typical Rigol flaws) this is probably not totally surprising, as a 100 MHz square with sharp rise/fall time would have substantial frequency components above 100 MHz, too -- still, I'm wondering if it would be possible to somehow get 100 MHz out of the I/O and what the limiting factors are; is it the connector? is it the I/O pin? is it the routing or layer stackup? for anything >50 MHz would I need to provide R-series and proper termination?
<d1b2>
typical Rigol flaws) this is probably not totally surprising, as a 100 MHz square with sharp rise/fall time would have substantial frequency components above 100 MHz, too -- still, I'm wondering if it would be possible to somehow get 100 MHz out of the I/O and what the limiting factors are; is it the connector? is it the I/O pin? is it the routing or layer stackup? for anything >50 MHz would I need to provide R-series and proper termination?
<d1b2>
<Attie> can you define "not great"? (screenshot?)
<d1b2>
<Attie> can you define "not great"? (screenshot?)
<d1b2>
<Attie> can you define "not great"? (screenshot?)
<d1b2>
<Attie> what was the I/O voltage set to? (see the level shifter datasheet for more details on limitations)
<d1b2>
<Attie> what was the I/O voltage set to? (see the level shifter datasheet for more details on limitations)
<d1b2>
<Attie> what was the I/O voltage set to? (see the level shifter datasheet for more details on limitations)
<d1b2>
<cfy_yfc> IO voltage set to 3V3; 100 MHz square
<d1b2>
<cfy_yfc> IO voltage set to 3V3; 100 MHz square
<d1b2>
<cfy_yfc> IO voltage set to 3V3; 100 MHz square
<d1b2>
<cfy_yfc> with 1.8V it kind of looks the same
<d1b2>
<cfy_yfc> with 1.8V it kind of looks the same
<d1b2>
<cfy_yfc> with 1.8V it kind of looks the same
<d1b2>
<Attie> interesting... i've not actually had a look at signals this fast, but @electronic_eel may have
<d1b2>
<Attie> interesting... i've not actually had a look at signals this fast, but @electronic_eel may have
<d1b2>
<Attie> interesting... i've not actually had a look at signals this fast, but @electronic_eel may have
<d1b2>
<Attie> the level shifter should be good for ~210Mbps at 3v3 to 3v3, though propagation delay is going to start becoming a big issue, especially if you're doing synchronous things
<d1b2>
<Attie> the level shifter should be good for ~210Mbps at 3v3 to 3v3, though propagation delay is going to start becoming a big issue, especially if you're doing synchronous things
<d1b2>
<Attie> the level shifter should be good for ~210Mbps at 3v3 to 3v3, though propagation delay is going to start becoming a big issue, especially if you're doing synchronous things
<d1b2>
<Attie> (up to 180' phase shift for one direction, 360' for round trip!)
<d1b2>
<Attie> (up to 180' phase shift for one direction, 360' for round trip!)
<d1b2>
<Attie> (up to 180' phase shift for one direction, 360' for round trip!)
<d1b2>
<Attie> you could try A) termination, e.g: 50 Ohm to ground, and B) measure on the level shifter's side of the resistor packs (e.g: RN3 / RN4)
<d1b2>
<Attie> you could try A) termination, e.g: 50 Ohm to ground, and B) measure on the level shifter's side of the resistor packs (e.g: RN3 / RN4)
<d1b2>
<Attie> you could try A) termination, e.g: 50 Ohm to ground, and B) measure on the level shifter's side of the resistor packs (e.g: RN3 / RN4)
<d1b2>
<cfy_yfc> the traces do not seem to be length-matched either; so for parallel/synchronous things at this speed this would not be good either
<d1b2>
<cfy_yfc> the traces do not seem to be length-matched either; so for parallel/synchronous things at this speed this would not be good either
<d1b2>
<cfy_yfc> the traces do not seem to be length-matched either; so for parallel/synchronous things at this speed this would not be good either
<d1b2>
<cfy_yfc> just testing the limits to know what I could use it for, and by doing so learning a great deal about this nice little gadget 😀 👍
<d1b2>
<cfy_yfc> just testing the limits to know what I could use it for, and by doing so learning a great deal about this nice little gadget 😀 👍
<d1b2>
<cfy_yfc> just testing the limits to know what I could use it for, and by doing so learning a great deal about this nice little gadget 😀 👍
<d1b2>
<Attie> great!
<d1b2>
<Attie> great!
<d1b2>
<Attie> great!
<d1b2>
<Attie> are you willing to share your test applet? I have have a poke too when i get a minute (point me at a fork?)
<d1b2>
<Attie> are you willing to share your test applet? I have have a poke too when i get a minute (point me at a fork?)
<d1b2>
<Attie> are you willing to share your test applet? I have have a poke too when i get a minute (point me at a fork?)
<whitequark[m]>
we advertise 100 Mbps right?
<whitequark[m]>
we advertise 100 Mbps right?
<whitequark[m]>
we advertise 100 Mbps right?
<whitequark[m]>
so 50 MHz
<whitequark[m]>
so 50 MHz
<whitequark[m]>
so 50 MHz
<d1b2>
<Attie> ah, that could be an oopsy in the copy / wording...!
<d1b2>
<Attie> ah, that could be an oopsy in the copy / wording...!
<d1b2>
<Attie> ah, that could be an oopsy in the copy / wording...!
<whitequark[m]>
well
<whitequark[m]>
well
<whitequark[m]>
well
<d1b2>
<cfy_yfc> "Each I/O is capable of a theoretical speed up to 100 MHz (actual speed depends on many factors)" from the crowd supply page; the word 'theoretical' was too tempting 😜
<d1b2>
<cfy_yfc> "Each I/O is capable of a theoretical speed up to 100 MHz (actual speed depends on many factors)" from the crowd supply page; the word 'theoretical' was too tempting 😜
<d1b2>
<cfy_yfc> "Each I/O is capable of a theoretical speed up to 100 MHz (actual speed depends on many factors)" from the crowd supply page; the word 'theoretical' was too tempting 😜
<whitequark[m]>
no, 100 MHz, 200 Mbps on the github page
<whitequark[m]>
no, 100 MHz, 200 Mbps on the github page
<whitequark[m]>
no, 100 MHz, 200 Mbps on the github page
<whitequark[m]>
we should probably tone that down
<whitequark[m]>
we should probably tone that down
<whitequark[m]>
we should probably tone that down
<whitequark[m]>
at least by half
<whitequark[m]>
at least by half
<whitequark[m]>
at least by half
<d1b2>
<cfy_yfc> let me please give this a little bit more thought and test a couple of things, before sending it out, OK?
<d1b2>
<cfy_yfc> let me please give this a little bit more thought and test a couple of things, before sending it out, OK?
<d1b2>
<cfy_yfc> let me please give this a little bit more thought and test a couple of things, before sending it out, OK?
<d1b2>
<Attie> @cfy_yfc sure
<d1b2>
<Attie> @cfy_yfc sure
<d1b2>
<Attie> @cfy_yfc sure
<d1b2>
<Attie> @wq might be sensible - i don't have a good feel for the fpga-side, or what the series "termination" will do to the signal
<d1b2>
<Attie> @wq might be sensible - i don't have a good feel for the fpga-side, or what the series "termination" will do to the signal
<d1b2>
<Attie> @wq might be sensible - i don't have a good feel for the fpga-side, or what the series "termination" will do to the signal
<d1b2>
<Attie> the datasheet claims ~210 Mbps at 3v3 to 3v3
<d1b2>
<Attie> the datasheet claims ~210 Mbps at 3v3 to 3v3
<d1b2>
<Attie> the datasheet claims ~210 Mbps at 3v3 to 3v3
<d1b2>
<Attie> (max)
<d1b2>
<Attie> (max)
<d1b2>
<Attie> (max)
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<_whitenotifier-4>
[GlasgowEmbedded/glasgow] whitequark pushed 1 commit to main [+0/-0/±1] https://git.io/JqAyS
<_whitenotifier-4>
[GlasgowEmbedded/glasgow] whitequark pushed 1 commit to main [+0/-0/±1] https://git.io/JqAyS
<_whitenotifier-4>
[GlasgowEmbedded/glasgow] whitequark pushed 1 commit to main [+0/-0/±1] https://git.io/JqAyS
<_whitenotifier-4>
[GlasgowEmbedded/glasgow] whitequark 021c64f - README: tone down I/O pin data rate expectations.
<_whitenotifier-4>
[GlasgowEmbedded/glasgow] whitequark 021c64f - README: tone down I/O pin data rate expectations.
<_whitenotifier-4>
[GlasgowEmbedded/glasgow] whitequark 021c64f - README: tone down I/O pin data rate expectations.
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<electronic_eel>
@cfy_yfc: could you post your test applet for the 100 MHz signal somewhere? then i could investigate where the limitations come from
<electronic_eel>
@cfy_yfc: could you post your test applet for the 100 MHz signal somewhere? then i could investigate where the limitations come from
<electronic_eel>
@cfy_yfc: could you post your test applet for the 100 MHz signal somewhere? then i could investigate where the limitations come from
<electronic_eel>
i have a 500 MHz scope and azonenbergs passive probes, so i think when using proper grounding techniques my measurement setup should be good enough to get proper readings
<electronic_eel>
i have a 500 MHz scope and azonenbergs passive probes, so i think when using proper grounding techniques my measurement setup should be good enough to get proper readings
<electronic_eel>
i have a 500 MHz scope and azonenbergs passive probes, so i think when using proper grounding techniques my measurement setup should be good enough to get proper readings
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<d1b2>
<rwhitby> @Attie I get all my pre-crimped from pololu.com
<d1b2>
<rwhitby> @Attie I get all my pre-crimped from pololu.com
<d1b2>
<rwhitby> @Attie I get all my pre-crimped from pololu.com