narmstrong changed the topic of #linux-amlogic to: Amlogic mainline kernel development discussion - our wiki http://linux-meson.com/ - ml linux-amlogic@lists.infradead.org - Publicly Logged on https://irclog.whitequark.org/linux-amlogic
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<lissyx> lvrp16, oh oh, 63¤ of taxes to pay to DHL :(
<lvrp16> lissyx: 63E?
<lvrp16> can't see that symbol
<lissyx> ah right
<lissyx> yeah, EUR
<lissyx> 15EUR extra for tax handling, and then 48 for VAT
<gab> yeah, don't ship your chinese stuff through dhl, it's guaranteed you'll pay taxes on receipt
<gab> (unless you're really in a hurry)
<lissyx> gab, I am in a hurry
<lissyx> I would have needed the boards like today :)
<lvrp16> lissyx: what percentage is that?
<lissyx> lvrp16, it's not really too much
<lissyx> lvrp16, it seems close to 20%
<Ivanovic> lissyx: that is the normal vat in europe
<Ivanovic> in germany it is 19%, in spain 20%, ...
<lissyx> yeah, and similar in france
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<lissyx> Ivanovic, I know
<Ivanovic> lissyx: that was more for lvrp16
<Ivanovic> ;)
<lissyx> having had to deal with shipping phones to india, I also know how much work those have to process in some countries
<lissyx> so i'm not surprised of the added pricing
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<Ivanovic> benefit in europe: any price in a store is including all taxes and fees, there is "statewide" only one tax rate, it does not depend on the town like in the US where driving 20 miles can mean 5 different tax rates depending on where you stop along the route (and still in the same state)
<lvrp16> Ivanovic: If England ran Europe, VAT would be 0%.
<Ivanovic> anyway, got to head to work...
<Ivanovic> lvrp16: uhm, did you see the UK in that list?
<Ivanovic> they are also at 20% (and every state is free to select the vat rate they want)
<Ivanovic> CU
<lvrp16> Ivanovic: yeah UK is in there. 20%. I'm saying if that if England runs the EU, taxes would be very low.
<lissyx> lvrp16, actually I think their custom declaration is wrong, recipient file there is not my name, but some "Imprecision Systems LLC"
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<lissyx> narmstrong, so, I was looking for thermal sensors on the lepotato, looking at device tree I found that SysFS entry: /sys/firmware/devicetree/base/scpi/sensors/#thermal-sensor-cells
<lissyx> narmstrong, but it's returning garbage, definition is here: https://github.com/torvalds/linux/blob/v4.14/arch/arm64/boot/dts/amlogic/meson-gx.dtsi#L204
<narmstrong> hi, you should have an hwmon device
<lissyx> oh, I see that
<lissyx> there's a temp1_label and temp1_input there
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<lvrp16> lissyx: I don't handle the fulfillment so I don't really know.
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<lissyx> lvrp16, just funny, I hope it's not going to be an issue when dealing with customs in roissy :)
<lissyx> narmstrong, works well with lm-sensors, thanks :)
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<narmstrong> lissyx: heppy it still works ^^
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<Ely> jbrunet: I tried removing CLK_IGNORE_UNUSED but then the kernel doesn't boot. I think it's because the register to disable the clock is part of a block that must be powered on first, so I'll have to keep the flag
<jbrunet> hum, weird
<jbrunet> that would mean the vdec clock is necessary to something
<Ely> It's probably the same deal with narmstrong's VPU clocks
<Ely> I'll test this but I think writing to HHI_VDEC_CLK_CNTL will stall if you haven't powered on the VDEC IP first
<jbrunet> which chip ?
<jbrunet> 905x ?
<Ely> so I guess the flag would not be used for its primary intent. The bootloader didn't set the clock on, rather I just don't want the register written to.
<Ely> yup S905X although it's the same behaviour on S905/S805
<Ely> let me confirm first that writing to the register actually stalls without the poweron via AO_RTI_GEN_PWR_SLEEP0
<jbrunet> I'd prefer we dig a bit before throwing those flags
<jbrunet> either the clock is critical (which makes no sense for the decoder) or it can disabled
<jbrunet> what's the bit index you are poking again ?
<Ely> HHI_VDEC_CLK_CNTL bit 8
<Ely> for vdec_1 gate
<Ely> mmh no write goes fine via devmem..
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<jbrunet> I have just booted a 905x (using mainline u-boot)
<jbrunet> devmem 0xc883c1e0 reads 0x0
<jbrunet> which means the gate is disabled on my system and it boot fine
<jbrunet> You'll to dig a bit more
<jbrunet> have
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<narmstrong> Ely: are you sure the clock is enabled before you access the vdec registers ?
<narmstrong> Use earlycon and enable the clk code debug prints to know where it crashes
<jbrunet> Re: I'll test this but I think writing to HHI_VDEC_CLK_CNTL will stall if you haven't powered on the VDEC IP first
<jbrunet> It is usally the other way around, it may stall if you access the vdec register before enabling the peripheral clock
<Ely> Huh. Now it boots without the flag.
<Ely> Apologies, the issue must have been unrelated.
<Ely> (tested with an unplug/replug)
<Ely> jbrunet: okay thanks for the info.
<Ely> And same on my C2/S905.. sigh sorry, don't know what happened.
<jbrunet> no worries
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