mnemoc changed the topic of #linux-sunxi to: Allwinner/sunxi development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
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<wens> ssvb: does the arm-burn-ljt script stress all cores on a multicore system?
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<lukas2511> mh... does anyone know if it is possible to get raw data of the touchscreen adc on a20? i need an adc that can operate at ~100kHz, and this seems to be the only adc inside the soc that can handle this speed
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<wens> lukas2511: the driver probably doesn't support that
<wens> but iirc the hardware does support adc mode
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<lukas2511> wens: mh, can you tell me where the driver for touchscreen support is located? i can't find it
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<wens> lukas2511: mainline? drivers/input/touchscreen/sun4i-ts.c
<lukas2511> wens: great, thanks.
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<ssvb> wens: no, it is stressing one core at a time
<ssvb> wens: I actually have identified the function in libjpeg-turbo which is sensitive to undervolting and will isolate it into a smaller test program
<ssvb> wens: it will be easy to stress all cores simultaneously this way
<ssvb> wens: btw, I'm afraid that this test is only good at high clock speed operating points
<ssvb> wens: at high clock speeds it detects memory corruption, at low clock speeds it deadlocks
<ssvb> wens: which means that the dominating factor affecting reliability may be different at different clock speeds/voltages
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<vbmithr> oliv3r: Can you confirm (or infirm) that you have lines like (dw-apb-uart 1c29800.serial: Couldn't set LCR to 0) in your dmesg ?
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<igraltis1> hi
<igraltis1> need the cubietruck special firmware to get wifi working?
<igraltis1> i get failed to power up wifi chip, retry again
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<oliv3r> vbmithr: somtimes
<oliv3r> anybody around that can demistify the container_of() macro? or rather how I am using it wrong :)
<oliv3r> want i'm trying to do, is have an array of structs, each pointing to a hrtimer struct, and thus the container_of would have to 'travel back' an array, dunno if that's technically possible at all
<mripard> no
<mripard> unless you have an explicit reference
<mripard> container_of is just structure offset black magic
<mripard> so it works in the case where you have the variable defined inside the structure itself
<mripard> not when you have a pointer to it
<oliv3r> ah crap
<oliv3r> mripard: would it help to understand if i show you the source? :)
<oliv3r> mripard: btw, did the serial port enumeration change recently? I used to have uart5 as ttyS1 (only had 2 ports defined) and now uart5 is ttyS5
<mripard> hmmm, weird
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<wens> oliv3r: it did
<wens> 8250_dw now looks at the aliases node to number serial ports
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<mripard> then the aliases are wrong
<mripard> the old behaviour was the right one
<mripard> well, at least, the second UART enabled on the system is supposed to be ttyS1
<wens> f77d55a3b56a serial: 8250_dw: get index of serial line from DT aliases
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<mripard> then we need to fix our DTs
<oliv3r> any way i still can use conainer_of?
<oliv3r> cause i think that's the _only_ method that i know off how to get data from the timer
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<mripard> oliv3r: remove the "*" in front of "timer" in your gpio_pwm_device
<oliv3r> that's it?
<oliv3r> the thing is, there are many gpio_pwm_device in gpio_pwm_chip (pwms);
<mripard> and?
<mripard> you're not using it as an array
<mripard> or at least, not your timer field
<oliv3r> hrtimer_init(pwm->pwms[i].timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
<oliv3r> ahh okay
<mripard> well, yeah
<mripard> you're just initialising one here
<oliv3r> so i can use container_of on the timer member, it traverses one level ups, to pwms[i] and i am thus pointing to that struct
<mripard> no
<mripard> it will give you a pointer to the structure containing that field
<oliv3r> i think i understand then; and the parameters to container_of, i'm not sure of the 3rd one, 'pwms' i ahve now
<mripard> so a pointer to gpio_pwm_device
<oliv3r> ah perfect, just what i need
<oliv3r> still, i'm not sure about the 'member' parameter, normally you'd give the name of the upperlaying variable? so how would that work for this array in my case?
<oliv3r> the magic of the contianer_of i tried to read, but that takes a while to fully grasp
<mripard> well, it's the member name
<oliv3r> so the name of the timer in this case?
<mripard> there's nothing more here, really
<oliv3r> so the name in the struct, to itself
<wens> mripard: we could remove our aliases, or just move/override them to/in the board dts
<mripard> the name of the variable within the structure yes
<oliv3r> mripard: ah see i was thinking a lvl higher
<mripard> wens: the latter would be better
<oliv3r> mripard: i owe you a kiss now :p
<mripard> oliv3r: it's C, it's never high level
<mripard> it really is just some basic offset calculation
<oliv3r> yeah i saw the bit, but i couldn't fully wrap my mind around it, now, i get it i think :)
<mripard> it takes the pointer, finds at which offset the field is within a structure, removes that from the original pointer, and that's it
<wens> mripard: i don't know how to "delete" entries though
<mripard> wens: hmmmm, remove them ? :)
<oliv3r> wens: btw, rotary encoder thing works on diff pins; e.g. gpio_to_irq() works atleast for these two pins
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<oliv3r> mripard: in pinctrl-sun7i-a20.c you wrote EITN12 - EINT15 for PIN(C, 19) - PIN(C, 22); how sure are you of that data? where did you get it?
<wens> mripard: the dtsi defines all of them, ideally you would get rid of the non active ones, and re-order the rest?
<mripard> oliv3r: datasheet
<mripard> wens: well, the aliases are completely board-specific
<mripard> I know I'm the one who removed it from the board to put it in the DTSI
<mripard> but I was young back then
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<wens> hehe
<wens> i should be able to send out new version of mmc patches tomorrow
<mripard> cool
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<igraltis1> i do cross compile like this:
<igraltis1> make -j4 ARCH=arm CROSS_COMPILE=armv7a-hardfloat-linux-gnueabi- INSTALL_MOD_PATH=output modules_install
<igraltis1> depmod: ERROR: failed to load symbols from /lib/modules/3.4.103+/kernel/fs/nfsd/nfsd.ko: Invalid argument
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<oliv3r> mripard: then the datasheet looks to be wrong; i couldn't get it to work on those PC* pins; but on the PI and PH pins it works fine
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<oliv3r> mripard: i see it in the usermanual on page 234; but that is wrong, the datasheet doesn't list it and the PIO section neither; so i guess that's a copy/paste error
<oliv3r> *supprise*
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<NiteHawk> seem likely. PC_CFG* doesn't list any association with EINT12 to 15, but PH_CFG1 does
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<oliv3r> NiteHawk: well the usermanual does list it on 1 page :)
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<NiteHawk> the one you referred to? i'd second the thought that page (p.234) might be in error then. the EINTs appear 'out of sequence' there, while they nicely conform with the other PH* pins
<oliv3r> yeah looks like a copy/paste error
<oliv3r> i couldn't get it to work
<oliv3r> wasted half - full day on it:)
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<silentcreek> Hi! Is anybody familiar with the differences of the sunxi-3.4 kernel and recent mainline kernels with regards to DMA and performance? The wiki says the DMA driver for mainline is still being worked on. Is there a working DMA driver in the sunxi-3.4 kernel?
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<silentcreek> I'm asking because I'm wondering if there would be a performance penalty when using a mainline kernel for applications that rely a lot on USB and GMAC performance compared to the community kernel 3.4. Oh, and btw. I'm using an A20 SoC, if that matters at all.
<silentcreek> I'd appreciate any insight. Thanks!
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<silentcreek> OK, gotta go now. But if anybody can can help me with my question, I'd appreciate it. I'll make sure to check the chat logs tomorrow.
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