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<MoeIcenowy>
tkaiser: yes, so weird
<MoeIcenowy>
but the mainline kernel of H5 is also not yet mature
<MoeIcenowy>
we must admit this
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<tkaiser>
MoeIcenowy: Well, to make an OpenMediaVault OS image for any sunxi device with mainline kernel in ok-ish state it's just: https://forum.armbian.com/index.php?/topic/2644-openmediavault-3x-customize-imagesh/
<tkaiser>
I also understand FriendlyELEC mentioning H3 NEO since then users buy this NAS box and upgrade to Gbit Ethernet capable NEO 2 later. I also understand poor thermal design (looks pretty, people like/buy) it. But I don't understand the crappy USB-to-SATA bridge inside ;)
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<miasma>
tkaiser: still cheaper than the rpi drive shields
<miasma>
wasn't the rpi alternative like $69 or so
<miasma>
my guess is they can't really use mainline kernel for networking until the driver hits mainline
<miasma>
so, kernel 4.13 earliest?
<miasma>
which will be released in 9/2017
<MoeIcenowy>
or you can apply sun8i-emac or sun8i-stmmac on 4.11
<miasma>
yes, but vendors can't consider it stable
<miasma>
some wifi/nas box vendors are ultra conservative and accept only kernels & mainline drivers which are at least few years old
<MoeIcenowy>
I think it won't be FriendlyELEC ;-)
<MoeIcenowy>
people who considers about stable won't use Allwinner's 3.4.39 ;-)
<miasma>
but, the rpi drive shield seems more insane. people probably consider pairing rpi with some 3 GB/s SSD drives. so they get 15 MB/s out of 3000 MB/s I/O bandwidth
<miasma>
the rpi provides a nice nas. a $99 rpi starter kit, $70 drive shield, $200 ssd -> 15 MB/s throughput
<tkaiser>
miasma: Those RPi gadgets are rip-offs anyway, those numbers published there exceeding USB2.0 maximum are a joke. Targeting clueless people who love to waste $70 on BS
<miasma>
but it's better supported and free unlike allwinner 32k bootloader blobs
<miasma>
:P
<MoeIcenowy>
RPI's bootloader blob problem is more critical
<lurchi_>
miasma: both bootloaders (RPI and AW) are proprietary and redistributable
<MoeIcenowy>
but rpi made people to ignore this
<KotCzarny>
miasma: point is, they could've done better for the same price, ie. better usb-sata chip and use box as a big radiator
<tkaiser>
MoeIcenowy: Users don't care about this. They are told there is a 'firmware' working and accept that.
<MoeIcenowy>
tkaiser: yes
<MoeIcenowy>
lurchi_: yes, but for AW we have properly working open-source replacement, for RPi the open-source replacement is still heavily broken
<miasma>
some people are worried that the AW blob phones home, has a key logger, and backdoors
<KotCzarny>
and we know they just have bugs
<KotCzarny>
;)
<miasma>
i've tried to say that it would be a miracle to fit all that in such a small package
<lurchi_>
MoeIcenowy: yes, I am aware, so thanks again to all the people getting the missing pieces implemented and upstream!
<tkaiser>
miasma: Which AW blob?
<miasma>
tkaiser: the bootloader built in the rom
<miasma>
with normal/fel boot
<MoeIcenowy>
although that blob is non-replaceable, it can be read out by a dd or sunxi-fel read
<miasma>
still it's so small, it's not anything like the rpi gpu firmware or intel ME
<MoeIcenowy>
and having a non-replacable mask rom bootloader is usually not something evil
<tkaiser>
miasma: Exactly
<MoeIcenowy>
and most importantly, it runs on ARM core, not other co-processor
<MoeIcenowy>
so it won't have any permission higher than AArch64 EL3
<MoeIcenowy>
however, now AArch64 EL3 is occupied by our own built ATF
<tkaiser>
The ARM cores on RPi 3 for example don't even know at which clockspeed they're running and cpufreq sysfs is lying
<MoeIcenowy>
yes they only shows the clock frequency written in the device tree
<lurchi_>
tkaiser: there is not even a mailbox interface?
<tkaiser>
And 600 MHz when the SoC totally overheats. But otherwise all the time 1200 MHz while in reality the 'firmware' clocked the cores dynamically down.
<MoeIcenowy>
lurchi_: yes, there is
<MoeIcenowy>
but you cannot get the reliable data directly from hardware
<MoeIcenowy>
nor can you control the hardware precisely
<MoeIcenowy>
P.S. I did a H3 THS patchset based on qschulz's A33 THS patchset
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<kristina>
tkaiser: you can disable the dynamic reclocking iirc.
<kristina>
i mean one of the biggest reasons i stopped working on an open source firmware was the fact that the hardware was so badly hacked together and ARM was so poorly integrated that i kind of lost interest in the platform.
<kristina>
1). fucky interrupts with their own buggy IC 2). NS (AxProt) forced to high on outgoing bus transactions from ARM ignoring the logic that's supposed to control that 3). no GIC 4). no TZPCs for ARM 5). while VC4 is interesting there's no MMU meaning no Darwin/Linux/whatever port to it, so that's no fun
<kristina>
been planning to mess with pine64 when i had spare time but not much recently.
<tkaiser>
kristina: Might be worth to mention your findings on https://github.com/christinaa/rpi-open-firmware IMO. Some people think the sole existence of your work means RPi could run 'blob free'
<kristina>
tkaiser: well it boots linux.
<MoeIcenowy>
the README has already said that many peripherals are missing
<MoeIcenowy>
"Support for USB, DMA, and Ethernet are in the works"
<MoeIcenowy>
kristina: P.S. Is RPi3 driven in a higher voltage by default than RPi2?
<kristina>
i think so.
<MoeIcenowy>
if so it may explain why RPi3 usually overheat
<KotCzarny>
tkaiser: i assume its not only better eth driver but overal optimized image
<MoeIcenowy>
-- Broadcom did the same thing on RPi3 as Xunlong did on H3 :-(
<MoeIcenowy>
(Place the CPU in a frequency higher than the highest that can survive safely without active cooling
<kristina>
MoeIcenowy: well ethernet depends on USB, once you get USB to work, you just need to mess with a few GPIOs to kick the USB hub/ethernet chip and it'll start, problem is that DWC2 USB PHY initialization which seems to be missing something.
<MoeIcenowy>
kristina: yes I know it ;-)
<kristina>
the way DWC2 is integrated on RPi is weird as fuck.
<MoeIcenowy>
DesignWares are easy to be weird integrated
<kristina>
also funnily enough, the DWC2 IP there takes clock input from the AUDIO domain but the IMAGE domain manages power to that block.
<KotCzarny>
um, your fucks must be interesting if you compare them to weirdness ;)
<kristina>
well DWC2 has a bunch of reserved registers.
<kristina>
that are like, for integration purposes i believe, each vendor uses them differently, probably depends on which IP revision they license out exactly and how they change it if they do at all.
<kristina>
MoeIcenowy: i mean bottom line i could get it to work, i just kind of lost interest since rpi is shit and same could be said of rpi foundation (my personal opinion).
<MoeIcenowy>
in fact I agree
<kristina>
i mean fuck, even allwinner has been better than broadcom in terms of releasing documentation and code.
<buZz>
its spelled boredcom
<KotCzarny>
well, broad has a few meanings
<kristina>
well i mean we use their IP, but in general it's nowhere near as bad as the VC4 shit, no wonder it's going under.
<MoeIcenowy>
kristina: in fact BCM283x is not the weirdest
<MoeIcenowy>
at least its VC4 codes do not have a digital signature
<kristina>
MoeIcenowy: you can burn an efuse if you want bootsig.bin to be used.
<kristina>
and you can burn a key, same as sunxi sid pretty much.
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<kristina>
i mean the VC4 does have a security model, it even has a secure and non secure mode (similar to game consoles more than anything, insecure code can still access most peripherals).
<kristina>
and you can dedicate a few ram chunks as secure (i believe 4 regions can be secure).
<kristina>
and there's also fuse arrays for various things, so i mean, i think as far as security goes VC4 isn't horrible for embedded (if you ignore the SoCs that have an ARM attached to it).
<MoeIcenowy>
P.S. even now some people consider RPis are better in open-source than AWs...
<kristina>
oh did i mention that ARM can access secure VC4 SDRAM regions because the security is enforced by the L1 cache controller on the VC4.
<kristina>
but not secure peripherals because that's controlled by AxProt.
<MoeIcenowy>
So it's a MCU with an ARMv8A co-processor ;-)
<miasma>
MoeIcenowy: < MoeIcenowy> kristina: P.S. Is RPi3 driven in a higher voltage by default than RPi2? <-- don't the new rpi2s use the same rpi3 soc due to problems with general availability of the old soc
<MoeIcenowy>
miasma: what?
<miasma>
MoeIcenowy: new rpi2 boards use rpi3 soc, underclocked
<kristina>
miasma: the VC4 IP is almost the same, BCM2710 is closer to BCM2709 than to BCM2708 (which was the original and horrid vc4 used in rpi).
<miasma>
sure
<kristina>
miasma: the problems are to do with lpddr2 actually.
<miasma>
ok
<kristina>
the only reason they could use 1gb of ram was because they found a vendor that made a compatible lpddr2 chip in the exact configuration they needed.
<miasma>
i just read some months ago that they're running out of rpi2 (bcm2709?) chips so they use the rpi3 chip on both boards
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<kristina>
but they can't mount it PoP.
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<kristina>
so BCM2837 is non PoP, the LPDDR2 package is mounted on the underside because the packages aren't exactly compatible.
<MoeIcenowy>
so how do they differ RPi2-BCM2709 with RPi3?
<kristina>
actually i don't think rpi2 with 1gb of ram uses pop either.
<kristina>
2709 isn't very different, it's pretty much the same family with a few minor tweaks for integration of a particular cortex ip.
<kristina>
same for 2710.
<MoeIcenowy>
yes I remember my rpi2 said directly bcm2836 on the chip
<kristina>
yeah that's mostly a hack by broadcom because their emif requires two lpddr2 chips and uses the cs to switch between the two, they found two vendors that made lpddr2 packages that were like that but not compatible with pop layouts of bcm278x.
<kristina>
well it doesn't require two chips, the problem is that they only support 512mb per chip.
<kristina>
so the 1gb of memory thing itself was a horrid hack.
<MoeIcenowy>
(I remembered the LPDDR3 used by SoPine, which has also two CS's
<kristina>
so you can see why i dislike the rpi, it's such a horrid pile of shit.
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<kristina>
MoeIcenowy: well the ram they use is pop, it's wired through the pcb, probably another reason why it heats up a lot.
<kristina>
the vc4 was never designed with 1gb ram in mind.
<kristina>
it can't even support 1gb fully because it can only it has a 30 bit address bus.
<kristina>
so peripherals have to be in the 1gb region too.
<MoeIcenowy>
so it's like the situation that use 4GiB DRAM for a x86-32 system with PAE? ;-)
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<kristina>
well, the 2 remaining bits are used to determine caching.
<kristina>
but they're useless from arm world since that has its own caches.
<tkaiser>
KotCzarny: Currently Armbian on NEO 2 is quite the opposite of 'optimized image'. We haven't implemented any tuning for sun50iw2 yet and the OS image is broken anyway (loading wrong DT). So it's a bit surprising that performance already looks ok.
<MoeIcenowy>
maybe I should ask for one piece of NEO2? ;-)
<MoeIcenowy>
I asked for a OPi Prime (just because I like it ;-) )
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<MoeIcenowy>
tkaiser: yes there's no integrated solution now for H3/H5 that to get the best state of a "H3/5 as NAS"
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<tkaiser>
MoeIcenowy: Well, I hope my complaints will lead to FriendlyELEC replacing the USB-to-SATA bridge with JMS567 or JMS578. Then there's some hope that Xunlong will release a GBit ready Zero variant and in the meantime I prepare Armbian to generate OpenMediaVault images for all 50 boards we support. Step 1 just done.
<MoeIcenowy>
I think there's already many boards supported by Armbian that is NAS-capable ;-)
<MoeIcenowy>
especially the A20 ones ;-)
<tkaiser>
MoeIcenowy: Sure but people look around for OpenMediaVault and the only OS images they find use shitty kernels and broken settings. That's a shame.
<tkaiser>
MoeIcenowy: And performance with those 'ready to run' OMV images is also horribly low.
<kristina>
i do like that you guys recently worked out how to enable security on sunxi and even get it to boot, pretty impressive.
<kristina>
'w 25
<kristina>
er oops.
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<MoeIcenowy>
(I think we can have different DTSIs that contain different opps, e.g. sun8i-h3-sy8106a-opp.dtsi includes an oppv2 table with voltage unit as 50mV, sun8i-h3-sy8113b-opp.dtsi includes an oppv2 table that have only 1100000 and 1300000 voltages, and another opp table lies in sun8i-h3-bananapi-m2-plus.dts which has all voltages set to 1.3v (as it have no adjustable regulator)
<MoeIcenowy>
tkaiser: can SY8113B H3 boards get 1.2GHz at 1.3V?
<tkaiser>
MoeIcenowy: Yep
<MoeIcenowy>
I saw 1.008GHz at most in your patch
<tkaiser>
MoeIcenowy: No idea why, this is stuff we took from megous months ago. I exchanged those opp and tested with different settings and it worked flawlessly.