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<ian_l>
Hey, Happy Holidays
<ian_l>
I can't easily tell from the wiki, have people had success running their own custom boot0s?
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<catphish>
ian_l come back and i'll tell you all about boot0
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<ian_l>
ayy I'm back baybee
<anarsoul>
catphish: ^^
<catphish>
ian_l: hello :)
<ian_l>
Happy holidays!
<catphish>
ian_l: the very short answer to your question is yes
<ian_l>
I got a little H8 dev board before x-mas and have been hacking away at it
<ian_l>
Fun times
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<catphish>
ian_l: the slightly longer answer is: it's pretty easy to get code running, but mostly useless unless you want to use it as a simple MCU, or write your own DRAM init code, which is much harder than it souns
<catphish>
i'm writing bare metal on h3, but i use u-boot's SPL (boot0) because i couldn't work out how to initialize the dram, everything else is (comparably) quite easy
<ian_l>
DRAM does seem hard lol
<ian_l>
catphish: are there docs for DRAM modules?
<catphish>
it's not the modules that are the problem, they're pretty standard, it's the dram controller in the allwinner you need to figure out
<catphish>
afaik the best source of information is the u-boot source code
<catphish>
but it's non-trivial
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<ian_l>
And they don't have any documentation for it in any of their user manuals?
<catphish>
not that i know of, but it may be documented in 3rd party manuals that i'm not aware of, enough of it is publicly known to figure it out, but there's no docs to hod your hand
<ian_l>
reeeee.
<ian_l>
I guess I need to find a regular plain-jane dram controller
<ian_l>
that has good documentation
<ian_l>
And figure how one is supposed to work
<ian_l>
Would you happen to know of one that is well-documented?
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<ian_l>
For example
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<ian_l>
Is there a reference ARM board like the CoreTiles with a documented DRAM controller?
<ian_l>
like for example the pl341 that I just learned about by looking up what I asked
<catphish>
i'm afraid i have no idea
<catphish>
i only looked at the h3 dram controller
<catphish>
my graphics engine can pretty much fill up a core with its crappy software rendering, but cann't see myself using 8
<ian_l>
and the ax818 has some serial data line for controlling it
<ian_l>
connected to PL0/1
<catphish>
and now i sleep
<catphish>
good luck :)
<ian_l>
Alright, good night
<ian_l>
It was a fun chat
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<KotCzarny>
catphish: there is a reason people should look for support level particular soc has
<KotCzarny>
even if it has brazillion of cores
<KotCzarny>
without software it's a doorstep
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<catphish>
KotCzarny: well indeed, though linux is always supported in some manner at least
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<plaes>
"supported" by BSP :)
<plaes>
and sometimes BSP does lots of hacks, for example H6 and PCIe
<jernej>
plaes: IIRC someone said that H6 PCIe issue is not really an issue on one of the BSD variant. So I guess it depends how kernel is designed.
<plaes>
oh
<jernej>
but yes, they have to put some hacks in place for Linux.
<BenG83>
NetBSD has kind of working PCIe
<BenG83>
it's still wip
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<catphish>
BSP?
<catphish>
my video output works nicely now, got a USB gamepad today so going to try to tackle OHCI
<plaes>
catphish: BSP - board support package
<catphish>
so those sometimes contain blobs and nastiness?
<plaes>
yes
<catphish>
how unpleasant :)
<KotCzarny>
bsp - blobs & sleazy programming
<catphish>
jernej: random side question, as you know HDMI much better than me, do you happen to know if it's possible to disable whatever negotiation HDMI does and just have it transmit blindly? it seems to me that despite setting all the parameters, it will still only work if there's a display connected during the init process
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<jernej>
catphish: I didn't try anything like that myself, but I think it should be possible. But now that I think about it, there is one parameter which gets calibrated when monitor is connected.
<jernej>
I'm not sure how important it is to get it right...
<catphish>
it's not hugely important, i was just hoping to improve startup times by removing unnecessary negotiation
<catphish>
right now there's quite a long period (3 seconds maybe) between initializing the hdmi, and it fully negotiating with the display and showing a picture, not a huge problem, just a mild annoyance
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<BenG83>
[ 0.062711] sun8i-v3s-pinctrl 1c20800.pinctrl: initialized sunXi PIO driver
<fALSO>
[ 10.706138] sun4i-codec 1c22c00.codec: ASoC: codec-analog@1f015c0 not registered
<fALSO>
[ 10.720601] sun4i-codec 1c22c00.codec: Failed to register our card
<fALSO>
i have a bunch of those on dmesg, and alsamixer doesnt seem to work
<fALSO>
just noticed that now
<aalm>
no, hacking on arm soc and having a boyfriend is not normal, but ok np. :]
<fALSO>
ahh it seems that the audio isnt yet supported
<ian_l>
If I had a girlfriend I would throw sbcs in her face for days
<fALSO>
=)
<catphish>
my wife is surprisingly disinterested in hacking SoCs :(
<miasma>
hmm have they updated the product images? those look quite good
<catphish>
the prange pis?
<miasma>
yea
<miasma>
some models used to have one crappy low res pic
<catphish>
oh, ok, i guess they took new photos then
<catphish>
they look great now
<miasma>
the situation is a lot better overall now :) when I bought my first opi pc, there was no support at all. it didn't even boot
<jernej>
fALSO: Analog audio on H3 work just fine with 4.20 (maybe also with earlier kernels, idk). Do you have CONFIG_SND_SUN8I_CODEC_ANALOG=y in config?
<fALSO>
maybe not
<fALSO>
going to check it out jernej !
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<ian_l>
So how does the uh, CPUS entry register work if you change the VBASE?
<catphish>
do the allwinners have 2 sound cores? i see "ac97" and "audio codec"
<ian_l>
I've done some RE on the boot rom
<ian_l>
but I guess the assume that you're still using the high vectors
<catphish>
ian_l: you got any code running on your board yet?
<ian_l>
Yeah
<ian_l>
I have uart, and can unleash cores from both clusters
<catphish>
cool
<catphish>
one thing i haven't worked out yet is how to boot additional cores
<catphish>
i guess it's just a matter of powering them on, and issuing an interrupt
<ian_l>
yeah its a bit strange
<catphish>
but haven't tried yet, wanted to attack USB first
<ian_l>
if you're using the high vectors (0xffff0000)
<ian_l>
I think they might get put into WFE mode
<ian_l>
WFI*
<ian_l>
and which point you can put a pointer in 0x01f01da4 to their entry point
<ian_l>
but I just switched the vector base, so I believe they follow the reset vector
<catphish>
i'll try to wake one at some point and see where it starts executing
<ian_l>
My current plan of attack is:
<ian_l>
1. Try to get the DRAM controller up and running properly
<ian_l>
2. Write some code like prime95/lima-memtester
<ian_l>
3. Try to figure out how fast my h8 can go without fucking up
<fALSO>
jernej, you rule! once again. it worked :-)