<MoeIcenowy>
the 3GiB DRAM is totally not enough for building C++ sources concurrently
<KotCzarny>
also known as swap killer
<MoeIcenowy>
I manually lowered the concurrent job number to 3
<MoeIcenowy>
otherwise it will eat more swap than the DRAM size itself
<KotCzarny>
turning off debug symbols help
<MoeIcenowy>
(I'm still not in linking stage
<KotCzarny>
debug symbols are added during build too
<MoeIcenowy>
but I think when building C++ sources, unrolling of templates are the real memory killer
<suprothunderbolt>
I still can't get DSI to work, the panel is detected, attaches, setup completes and then VBLANK interrupt is enabled, but vblank wait times out
<MoeIcenowy>
are you sure your panel timing is very correct?
<suprothunderbolt>
no vblank interrupts are generated. I'm not sure / why.
<suprothunderbolt>
MoeIcenowy, I've asked the manufacturer, they gave me these timing and the driver source. I've got the data sheets too.
<suprothunderbolt>
so relatively sure... though they say they have someone using it with Linux but it's mostly Android.
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<suprothunderbolt>
would this be how it would fail if timing was wrong?
<suprothunderbolt>
The board layout could be wrong or I could have messed up the soldering too :)
<MoeIcenowy>
I met no vblank when timing wrong
<MoeIcenowy>
and when timing is fixed, vblank fires
<suprothunderbolt>
I was pretty sure it was my merging of the patch into 4.19 but now i'm running 5.0 and the same error
<suprothunderbolt>
I can ask the manufacturer more questions if needed, I just don't know what else to ask.
<anarsoul>
suprothunderbolt: you need working image for your board from manufacturer
<anarsoul>
it's impossible to figure out what's going wrong - DSI controller doesn't provide any meaningful error reporting
<anarsoul>
so unless you've got DSI analyzer all you can do is shooting in the dark
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<suprothunderbolt>
anarsoul, what do you mean? They've just given me an android driver
<suprothunderbolt>
shooting in the dark sounds scary... :) I've got a 4 channel 500mhz scope.
<suprothunderbolt>
I'm running the v7 patch from Amarula's github. The v9 patch is a bit harder to merge on 5.0. I applied v9 onto 4.19 though and got the same thing
<suprothunderbolt>
does the init commands not failing suggest any amount of correctness or is there no ack at that stage?
<suprothunderbolt>
Oh and I don't know what TE should be connected to. The panel has tear enable pins but I don't know how to specify what they are connected to in a driver or what to do with them.
<suprothunderbolt>
I think that could be the issue. The panel generates a TE signal that is meant to generate the vblank but that isn't connected
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<suprothunderbolt>
I've never done anything with android but would it be useful to try and run android on it and use their supplied driver some how ?
<KotCzarny>
at least you will confirm it works
<KotCzarny>
:)
<suprothunderbolt>
getting android to work sounds time consuming!
<suprothunderbolt>
but I'm not getting anywhere with other options
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<suprothunderbolt>
I've got the data sheet for the driver chip as well, so I can work out what most of the random commands mean but that doesn't mean I understand any of them... :)
<KotCzarny>
but, have you seen your particular panel working at all?
<KotCzarny>
things are sometimes DoA
<wens>
MoeIcenowy: don't to it # build chromium on sunxi boards
<wens>
building on a reasonably fast server takes maybe an hour? that's 24 cores with plenty of memory
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<suprothunderbolt>
KotCzarny, no i haven't. I've got 5 of the panels. No idea if my base board is okay though. I might have soldered something wrong, or made a mistake in the layout
<plaes>
fa
<suprothunderbolt>
the backlight works fine
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<libv>
hah
<libv>
someone has gone and put actual info in the chip page.
<libv>
points for realizing that putting info into the sunxi wiki is the durable option.
<libv>
not that sunxi has good infrastructure
<libv>
but it is way smarter than following what device makers want
<libv>
with their misplaced dreams of becoming an ecosystem
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<KotCzarny>
mostly it's the people who got some useful info from linux-sunxi wiki that contribute stuff back
<KotCzarny>
and often to have a braindump backup online
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<libv>
KotCzarny: i was lambasting the $hitpiness of the ntc chip
<libv>
they supposedly were a .us, and they did a real kickstarter, sadly at the time of us making gpl violations noise
<libv>
a .us company
<libv>
this forced their hand in that they paid free-electrons to keep their statements about being open source
<libv>
but apart from that, they were just as rubbish as all the other players in the same field for the same price
<KotCzarny>
still, most likely it was some user that put the info
<libv>
and they played the exact same tricks, especially when fooling themselves that they were going to make money by making it an ecosystem to match the rpi religion
<libv>
it was
<libv>
but it took 4 years for that to happen
<libv>
the company has been defunct now for quite a while
<KotCzarny>
that's the problem/fun with communities and free work
<KotCzarny>
order in chaos happens, but you have big data set to make it happen
<KotCzarny>
*must have
<libv>
back in the day, it was hailed as much more than a competitor to bpi and opi, which were already "big" then too, but which clearly were low cost $hitpies
<KotCzarny>
all words and no essence?
<libv>
but it was pretty clear where that journey was headed, and it was a surprise for them to actually bow to the pressure and throw bulk revenue at free-electrons
<libv>
1-2 weeks into the kickstarter, they found out about the gpl violations
<libv>
because their backers had plastered it all over their comments
<libv>
oops.
<libv>
before that it was "yeah, put the open-source buzzword in there"
<libv>
this was mostly an allwinner backed operation
<libv>
there was no way that they could hit that pricepoint without allwinner providing socs cheaply (as calculated by tsvetan from olimex)
<libv>
and some people of allwinner joined the ntc company
<libv>
it was a weird mix of many strange things together, and it felt wrong from the getgo
<libv>
unlike the clear intent and matching execution of bpi and opi
<libv>
very few people kid themselves about those boards and companies
<megi>
sysfs gpio interface is not that dumb after all, you can even poll() on gpio#/value according to The Code
<megi>
and it may even use irqs under the hood
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<DuClare>
megi: It's kinda weird though, the events are POLLPRI
<DuClare>
And you have to seek to the start to read again
<DuClare>
Which imo doesn't sit well with most existing code out there that expects a simple poll -> read -> poll -> read
<DuClare>
And libraries such as libev don't even support POLLPRI
<megi>
DuClare: interesting, I haven't tested it yet, so thanks for info
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<MoeIcenowy>
in fact I think the NTC GR8 package is interesting ;-)
<MoeIcenowy>
it can be more interesting if it's not BGA but QFP ;-)
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<willmore>
There were a lot of people on the hobbiest side interested by the non-BGA packages.
<willmore>
There was the hope if the software matured and the chips were generally available that they could spin their own designs more easily than if it was a BGA only part.
<KotCzarny>
maybe someone should invent bga chip holder that would double as a heatsink?
<KotCzarny>
not very reliable, but very easy for diy
<willmore>
Still have to mount the BGA on the adapter.
<willmore>
megi, now you have to solder that *and* they're crazy expensive.
<KotCzarny>
+1
<KotCzarny>
would be probably more expensive than soc itself
<KotCzarny>
:>
<megi>
yes :)
<willmore>
Well more expensive.
<willmore>
And require more PCB layers as they're through hole.
<willmore>
QFP is good for 144 pins or so, that's plenty for hobbiest level stuff.
<willmore>
Well, you can get huge ones...
<willmore>
There were a lot of older FPGAs with crazy big leaded packages.
<megi>
something simplified would have to be SoC specific though, so that you can merge all the grounds and supplies on the adapter
<megi>
and not have crazy amount of pins on the side
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<megi>
and perhaps with integrated decoupling caps
<megi>
that are usually at the other side of the board
<megi>
under the bga package
<KotCzarny>
or just minimize amount of pins by using fast serial interfaces?
<KotCzarny>
;)
<KotCzarny>
imagine lcd on 1 pin
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<megi>
oh the benefits of seeing each pixel being drawn
<KotCzarny>
the benefits of cheap cables!
<KotCzarny>
but we have 100mbits on a single pair (roughly)
<KotCzarny>
and it's old tech
<KotCzarny>
fhd@60fps is ~37mbits
<KotCzarny>
erm. 373mbits
<megi>
aren't we re-inventing SoMs?
<KotCzarny>
there was a time in history where single wire was good enough for displaying things (bnc, cvbs), would such wonder return?
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* willmore
remembers the era of cvbs and does not wish for it to return
<KotCzarny>
we can do it digital 1-wire
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* willmore
prefers differential signals
<KotCzarny>
ok, digital 2-wire
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<plaes>
there's balun to convert coaxial to diff-wire :)
<plaes>
and back
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<willmore>
plaes, that's not the same thing. Differential signals are useful because they don't radiate as much noise and aren't as succeptable to induced noise. Baluns--like all transformers--have a limited bandwidth, so they're not good for all signals.
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<plaes>
yup, this was for old cctv setup
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<tllim>
@wens, welcome to Bay Area. If you interest to meet up today, lets me know. I will travel to LA/San Diego on tomorrow morning and return on Sunday night.
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<jernej>
wens, mripard: just wondering, when will be sunxi/clk-fixes-for-5.1 PR sent?
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<jo0nas>
MoeIcenowy: could you help me debug why USB isn't working in the patchset I am trying to push to mainline?
<jo0nas>
...for teres-i, I mean
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