sb0_ changed the topic of #m-labs to: https://m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
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<_whitenotifier> [nmigen] mithro opened issue #2: How do multiple If statements work? - https://git.io/fpFI7
<whitequark> mithro: ok, give me a sec
<whitequark> sb0: yes I've seen edalize
<whitequark> will need to look at it
<_whitenotifier> [nmigen] whitequark commented on issue #1: Example of embedding exisiting Verilog? - https://git.io/fpFqt
<_whitenotifier> [nmigen] whitequark commented on issue #2: How do multiple If statements work? - https://git.io/fpFql
<_whitenotifier> [nmigen] whitequark closed issue #2: How do multiple If statements work? - https://git.io/fpFI7
<_whitenotifier> [nmigen] whitequark edited a comment on issue #2: How do multiple If statements work? - https://git.io/fpFql
<_whitenotifier> [nmigen] mithro commented on issue #2: How do multiple If statements work? - https://git.io/fpFqz
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<_whitenotifier> [nmigen] whitequark commented on issue #2: How do multiple If statements work? - https://git.io/fpFqK
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<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±3] https://git.io/fpFYs
<_whitenotifier> [m-labs/nmigen] whitequark 55e729f - setup: add missing import.
<_whitenotifier> [m-labs/nmigen] whitequark 3e59d85 - back.pysim: use bare ints for signal values (-5% runtime).
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467825698?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.09% (+0.08%) compared to b09f4b1 - https://codecov.io/gh/m-labs/nmigen/commit/3e59d857e17f93eb867567a93320aea2603d1bb0
<_whitenotifier> [nmigen] Success. 100% of diff hit (target 71%) - https://codecov.io/gh/m-labs/nmigen/commit/3e59d857e17f93eb867567a93320aea2603d1bb0
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<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±3] https://git.io/fpF32
<_whitenotifier> [m-labs/nmigen] whitequark d791b77 - back.pysim: allow suspending processes until a tick in a domain.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467842040?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 71.02% (-0.08%) compared to 3e59d85 - https://codecov.io/gh/m-labs/nmigen/commit/d791b77cc868b64d3be3102980cf6c0ed3646ce5
<_whitenotifier> [nmigen] Failure. 57.14% of diff hit (target 71.09%) - https://codecov.io/gh/m-labs/nmigen/commit/d791b77cc868b64d3be3102980cf6c0ed3646ce5
<whitequark> rjo: ping
<whitequark> mithro: ping
<mithro> whitequark: pong?
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<whitequark> tell me when you're done
<whitequark> mithro: poke?
<whitequark> i'd like to not leave registrations open
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<_whitenotifier> [m-labs/nmigen] whitequark pushed 3 commits to master [+0/-0/±4] https://git.io/fpFCK
<_whitenotifier> [m-labs/nmigen] whitequark 3bb7a87 - back.pysim: implement "sync processes", like migen.sim generators.
<_whitenotifier> [m-labs/nmigen] whitequark e4d08d2 - back.pysim: delay clock processes by one half period.
<_whitenotifier> [m-labs/nmigen] whitequark cb998d8 - back.pysim: explain how delta cycles work.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467877845?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.02% remains the same compared to d791b77 - https://codecov.io/gh/m-labs/nmigen/commit/cb998d891b73e5db8569aaac62f3ce8858a89070
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing d791b77...cb998d8 - https://codecov.io/gh/m-labs/nmigen/commit/cb998d891b73e5db8569aaac62f3ce8858a89070
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<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±2] https://git.io/fpFln
<_whitenotifier> [m-labs/nmigen] whitequark a10791e - back.pysim: if requested, write a gtkw file with a useful preset.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467887339?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.02% remains the same compared to cb998d8 - https://codecov.io/gh/m-labs/nmigen/commit/a10791e160bba5081cd51e7f71a9649c429dbca9
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing cb998d8...a10791e - https://codecov.io/gh/m-labs/nmigen/commit/a10791e160bba5081cd51e7f71a9649c429dbca9
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpFlg
<_whitenotifier> [m-labs/nmigen] whitequark 6aefd0c - back.pysim: raise an exception if delta cycles blow a process deadline.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467888568?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.02% remains the same compared to a10791e - https://codecov.io/gh/m-labs/nmigen/commit/6aefd0c04c92545562f571aab46eab91cb1ab378
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing a10791e...6aefd0c - https://codecov.io/gh/m-labs/nmigen/commit/6aefd0c04c92545562f571aab46eab91cb1ab378
<whitequark> rjo: added a small feature to preseed a .gtkw file with given signals
<rohitksingh_work> whitequark: Hi! what could be wrong here? http://paste.debian.net/1055798 I followed the instructions as mentioned here (https://libfx2.readthedocs.io/en/latest/prerequisites.html)
<whitequark> rohitksingh_work: try updating to sdcc 3.9
<whitequark> sdcc 3.7 seems to have a bug I'm hitting recently, somehow
<rohitksingh_work> whitequark: oh, thank you so much! :)
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<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±4] https://git.io/fpFBP
<_whitenotifier> [m-labs/nmigen] whitequark bb843cb - back.pysim: fix completely broken codegen for Switch.
<_whitenotifier> [m-labs/nmigen] whitequark b58715c - ast, back.pysim: allow specifying user-defined decoders for signals.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467902441?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.09% (+0.07%) compared to 6aefd0c - https://codecov.io/gh/m-labs/nmigen/commit/b58715c5dc25499b46f301a59a35fed3a1a744cb
<_whitenotifier> [nmigen] Failure. 40% of diff hit (target 71.02%) - https://codecov.io/gh/m-labs/nmigen/commit/b58715c5dc25499b46f301a59a35fed3a1a744cb
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±2] https://git.io/fpFRY
<_whitenotifier> [m-labs/nmigen] whitequark b34c1a9 - back.pysim: undriven comb signals should return to reset value.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467905939?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 71.04% (-0.06%) compared to b58715c - https://codecov.io/gh/m-labs/nmigen/commit/b34c1a9ad083118e0bf646b5d99087a8537e3435
<_whitenotifier> [nmigen] Failure. 0% of diff hit (target 71.09%) - https://codecov.io/gh/m-labs/nmigen/commit/b34c1a9ad083118e0bf646b5d99087a8537e3435
<whitequark> rjo: okay, i think the simulator is largely done
<whitequark> if you want to evaluate performance you can do it now
<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±7] https://git.io/fpFVY
<_whitenotifier> [m-labs/nmigen] whitequark 7d91dd5 - fhdl.xfrm: implement DomainLowerer.
<_whitenotifier> [m-labs/nmigen] whitequark 240a40c - back.pysim: robustly retrieve vcd names for clk/rst when writing gtkw.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467943578?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.37% (+0.33%) compared to b34c1a9 - https://codecov.io/gh/m-labs/nmigen/commit/240a40c2c2f8d6f1dea8ebbf2b2e601da50e8ec4
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing b34c1a9...240a40c - https://codecov.io/gh/m-labs/nmigen/commit/240a40c2c2f8d6f1dea8ebbf2b2e601da50e8ec4
<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fpFPJ
<_whitenotifier> [m-labs/nmigen] whitequark 105113f - back.pysim: accept any valid assignments from processes.
<_whitenotifier> [m-labs/nmigen] whitequark 1b7f8c7 - back.pysim: general clean-up.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467972449?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.37% remains the same compared to 240a40c - https://codecov.io/gh/m-labs/nmigen/commit/1b7f8c79501246f96c565544bc2275a7f7729dbd
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing 240a40c...1b7f8c7 - https://codecov.io/gh/m-labs/nmigen/commit/1b7f8c79501246f96c565544bc2275a7f7729dbd
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±3] https://git.io/fpFXP
<_whitenotifier> [m-labs/nmigen] whitequark dd00b5e - back.pysim: more general clean-up.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467980436?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.37% remains the same compared to 1b7f8c7 - https://codecov.io/gh/m-labs/nmigen/commit/dd00b5e2d6774adb23d41e5b95a9f87ec8b42bd3
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing 1b7f8c7...dd00b5e - https://codecov.io/gh/m-labs/nmigen/commit/dd00b5e2d6774adb23d41e5b95a9f87ec8b42bd3
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±2] https://git.io/fpFMk
<_whitenotifier> [m-labs/nmigen] whitequark 151d079 - fhdl.ir: oops, we defined DomainError twice.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467985627?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. Absolute coverage decreased by -0.02% but relative coverage increased by +28.62% compared to dd00b5e - https://codecov.io/gh/m-labs/nmigen/commit/151d079f01447ec8cde0171a98797638c0812985
<_whitenotifier> [nmigen] Success. 100% of diff hit (target 71.37%) - https://codecov.io/gh/m-labs/nmigen/commit/151d079f01447ec8cde0171a98797638c0812985
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<_whitenotifier> [m-labs/nmigen] whitequark pushed 3 commits to master [+0/-0/±4] https://git.io/fpFyN
<_whitenotifier> [m-labs/nmigen] whitequark 3ad79ec - back.pysim: allow processes to evaluate expressions.
<_whitenotifier> [m-labs/nmigen] whitequark 7fc9f98 - back.pysim: skip VCD signal population if VCD is not requested.
<_whitenotifier> [m-labs/nmigen] whitequark 7d3f7f2 - back.pysim: accept (and evaluate) generator functions.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/467999531?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 71.25% (-0.11%) compared to 151d079 - https://codecov.io/gh/m-labs/nmigen/commit/7d3f7f277ac1951c5f6d243b9c13091c45cc467d
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing 151d079...7d3f7f2 - https://codecov.io/gh/m-labs/nmigen/commit/7d3f7f277ac1951c5f6d243b9c13091c45cc467d
<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fpFSQ
<_whitenotifier> [m-labs/nmigen] whitequark 654722c - back.pysim: add gtkw traces even more robustly.
<_whitenotifier> [m-labs/nmigen] whitequark 625c55a - back.pysim: throw exceptions back at processes.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468003392?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.25% remains the same compared to 7d3f7f2 - https://codecov.io/gh/m-labs/nmigen/commit/625c55a3b899a7888dca4e31d9672e70dec9d6a0
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing 7d3f7f2...625c55a - https://codecov.io/gh/m-labs/nmigen/commit/625c55a3b899a7888dca4e31d9672e70dec9d6a0
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpF9n
<_whitenotifier> [m-labs/nmigen] whitequark 1655b59 - back.pysim: show more legible names for processes in errors.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468006324?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.25% remains the same compared to 625c55a - https://codecov.io/gh/m-labs/nmigen/commit/1655b59d1bd0c68dfb7550152af5a6b15e6a211c
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing 625c55a...1655b59 - https://codecov.io/gh/m-labs/nmigen/commit/1655b59d1bd0c68dfb7550152af5a6b15e6a211c
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<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+1/-0/±4] https://git.io/fpF72
<_whitenotifier> [m-labs/nmigen] whitequark d9aaf01 - back.pysim: close .vcd/.gtkw files on context manager exit.
<_whitenotifier> [m-labs/nmigen] whitequark 474d46c - back.pysim: implement most operators and add tests.
<_whitenotifier> [nmigen] Failure. The Travis CI build failed - https://travis-ci.org/m-labs/nmigen/builds/468019528?utm_source=github_status&utm_medium=notification
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpFdd
<_whitenotifier> [m-labs/nmigen] whitequark 68f8dab - Travis: install pyvcd.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468029756?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.54% (+17.02%) compared to 474d46c - https://codecov.io/gh/m-labs/nmigen/commit/68f8dabb2909cbd9bab48a8d5c9898025f10839c
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing 474d46c...68f8dab - https://codecov.io/gh/m-labs/nmigen/commit/68f8dabb2909cbd9bab48a8d5c9898025f10839c
<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±4] https://git.io/fpFpn
<_whitenotifier> [m-labs/nmigen] whitequark e3f32a1 - back.pysim: better naming. NFC.
<_whitenotifier> [m-labs/nmigen] whitequark 9307a31 - back.pysim: Simulator({gtkw_signals→traces}=).
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468048949?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.54% (+0%) compared to 68f8dab - https://codecov.io/gh/m-labs/nmigen/commit/9307a316781da15a5c1fdd508c45afe0febf87b4
<_whitenotifier> [nmigen] Success. 100% of diff hit (target 71.54%) - https://codecov.io/gh/m-labs/nmigen/commit/9307a316781da15a5c1fdd508c45afe0febf87b4
<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+2/-0/±1] https://git.io/fpbvf
<_whitenotifier> [m-labs/nmigen] whitequark baba472 - compat.fhdl.module: update deprecation messages.
<_whitenotifier> [m-labs/nmigen] whitequark a0d555a - compat: add genlib.cdc.MultiReg shim.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468062381?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.54% remains the same compared to 9307a31 - https://codecov.io/gh/m-labs/nmigen/commit/a0d555a9fc5901b8163b2d5d28b2a31c6b5bdf1f
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing 9307a31...a0d555a - https://codecov.io/gh/m-labs/nmigen/commit/a0d555a9fc5901b8163b2d5d28b2a31c6b5bdf1f
<_whitenotifier> [m-labs/nmigen] whitequark pushed 3 commits to master [+2/-0/±3] https://git.io/fpbvj
<_whitenotifier> [m-labs/nmigen] whitequark 50ba443 - fhdl.ast: fix Switch with constant test.
<_whitenotifier> [m-labs/nmigen] whitequark 7200346 - genlib.io: import TSTriple from Migen.
<_whitenotifier> [m-labs/nmigen] whitequark 3b23645 - compat: add fhdl.specials.TSTriple shim.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468066066?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. Absolute coverage decreased by -0.08% but relative coverage increased by +3.45% compared to a0d555a - https://codecov.io/gh/m-labs/nmigen/commit/3b23645fb7ef71c608a379d9ced17c03172385d2
<_whitenotifier> [nmigen] Success. 75% of diff hit (target 71.54%) - https://codecov.io/gh/m-labs/nmigen/commit/3b23645fb7ef71c608a379d9ced17c03172385d2
<_whitenotifier> [m-labs/nmigen] whitequark pushed 3 commits to master [+1/-0/±3] https://git.io/fpbJG
<_whitenotifier> [m-labs/nmigen] whitequark 3bc3647 - compat.fhdl.module: fix specials.
<_whitenotifier> [m-labs/nmigen] whitequark 88970ee - pysim.back: fix add_sync_process wrapper to handle signals correctly.
<_whitenotifier> [m-labs/nmigen] whitequark 17d26c8 - compat: add run_simulation shim.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468073968?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 71.19% (-0.26%) compared to 3b23645 - https://codecov.io/gh/m-labs/nmigen/commit/17d26c83297e32d73d572afdfb37c32149b28975
<_whitenotifier> [nmigen] Success. Coverage not affected when comparing 3b23645...17d26c8 - https://codecov.io/gh/m-labs/nmigen/commit/17d26c83297e32d73d572afdfb37c32149b28975
<whitequark> sb0: what unit is clock period in run_simulation?
<whitequark> ns?
<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±3] https://git.io/fpbTk
<_whitenotifier> [m-labs/nmigen] whitequark 0ef5ced - compat.sim: match clock period.
<_whitenotifier> [m-labs/nmigen] whitequark e230383 - back.pysim: make initial phase configurable.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468082515?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 71.11% (-0.08%) compared to 17d26c8 - https://codecov.io/gh/m-labs/nmigen/commit/e230383aac6deeb2c72fbfd5d1899744a17ade24
<_whitenotifier> [nmigen] Failure. 25% of diff hit (target 71.19%) - https://codecov.io/gh/m-labs/nmigen/commit/e230383aac6deeb2c72fbfd5d1899744a17ade24
<sb0> a typical bug is forgetting to add this in migen. would there be a way of addressing this issue in nmigen?
<sb0> iirc yes it's ns
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<whitequark> sb0: yes. i will have the signals track the modules they are driven from. and if some but not all of these modules are in the final design, nmigen will get angry at you.
<whitequark> driven/used
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<sb0> whitequark: for multi clock domain designs, I'd also like signals driven in one domain and sampled in another to cause a warning
<sb0> unless each such path is explicitly marked by the user as valid
<whitequark> sure
<whitequark> that's even easier
<whitequark> what about I/O pins?
<whitequark> forgetting a MultiReg is a fairly frequent error
<sb0> ideally, there should be some framework to automatically instantiate LVDS buffers and such
<sb0> ah, for CDC
<whitequark> oh, I have this kind of thing in Glasgow
<whitequark> maybe we should rethink I/O for nmigen
<sb0> in artiq there are certain things that are sometimes run over CMOS (on KC705) and LVDS (on Kasli over the ribbon cables)
<sb0> right now this is not handled in an elegant manner
<sb0> I guess I/O pins could be marked as asynchronous by default, and also could have a clock domain associated with them
<sb0> then the same rule applies
<whitequark> ok
<sb0> the "asychronous mode" is basically another "invisible" clock domain
<whitequark> what if one half of a comb signal is driven from domain A and another half from domain B?
<whitequark> how should this be handled?
<sb0> 1. emit a warning (unless the user says it is valid) 2. treat the result as asynchronous ?
<_whitenotifier> [nmigen] whitequark opened issue #3: Ensure that all submodules are added to the design - https://git.io/fpbth
<whitequark> ok
<_whitenotifier> [nmigen] whitequark opened issue #4: Require signals crossing clock domains to be explicitly marked - https://git.io/fpbqv
<sb0> also, there should also be warnings for paths that are marked as valid CDC but end up being in the same domain
<_whitenotifier> [nmigen] whitequark edited issue #4: Require signals crossing clock domains to be explicitly marked - https://git.io/fpbqv
<sb0> i.e. anything other than marking exactly the CDC paths as valid CDCs results in warnings
<_whitenotifier> [nmigen] whitequark opened issue #5: Detect multiple drivers in different hierarchical modules - https://git.io/fpbqt
<_whitenotifier> [nmigen] whitequark edited issue #4: Require signals crossing clock domains to be explicitly marked - https://git.io/fpbqv
<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fpbqG
<_whitenotifier> [m-labs/nmigen] whitequark 4f5b4a9 - back.pysim: in simulator sync processes, start by waiting for a tick.
<_whitenotifier> [m-labs/nmigen] whitequark 120d817 - back.pysim: undriven sync signals should return to previous value.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468104792?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 71.03% (-0.08%) compared to e230383 - https://codecov.io/gh/m-labs/nmigen/commit/120d8171230883e8afb13eaf9e25c3985b9386b8
<_whitenotifier> [nmigen] Failure. 0% of diff hit (target 71.11%) - https://codecov.io/gh/m-labs/nmigen/commit/120d8171230883e8afb13eaf9e25c3985b9386b8
<sb0> whitequark: what about supporting CEInserter and such as context managers? (just a random idea...)
<whitequark> sb0: hmm i'll think about it
<whitequark> well, CEInserter is just an If.
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<rjo> whitequark: pong. i registered on that notifico thing. thanks.
<rjo> whitequark: i haven't had time to test sim and gtkw and pretty much anything on nmigen. but i want to do that soon. ;) but the recent changes look great.
<whitequark> rjo: there's still a few last bugs in pysim. fishing one now.
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<GitHub-m-labs> [artiq] jordens commented on issue #838: A couple notes from intensive use in the field on windows and linux for a couple weeks:... https://github.com/m-labs/artiq/issues/838#issuecomment-447415689
<GitHub-m-labs> [artiq] jordens commented on issue #838: A couple notes from intensive use in the field on windows and linux for a couple weeks:... https://github.com/m-labs/artiq/issues/838#issuecomment-447415689
<GitHub-m-labs> [artiq] jordens commented on issue #838: A couple notes from intensive use in the field on windows and linux for a couple weeks:... https://github.com/m-labs/artiq/issues/838#issuecomment-447415689
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<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fpbGc
<_whitenotifier> [m-labs/nmigen] whitequark 70ebc6f - back.pysim: implement blocking assignment semantics correctly.
<_whitenotifier> [m-labs/nmigen] whitequark fe5fb34 - back.pysim: squash one level of hierarchy.
<_whitenotifier> [nmigen] Failure. The Travis CI build failed - https://travis-ci.org/m-labs/nmigen/builds/468131954?utm_source=github_status&utm_medium=notification
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpbZO
<_whitenotifier> [m-labs/nmigen] whitequark 71304c9 - back.pysim: fix implicit boolean conversion.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468137196?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.17% (+1.41%) compared to fe5fb34 - https://codecov.io/gh/m-labs/nmigen/commit/71304c9fe72ae3c46ebcf4a6d41726e9197d1aa8
<_whitenotifier> [nmigen] Success. 100% of diff hit (target 69.76%) - https://codecov.io/gh/m-labs/nmigen/commit/71304c9fe72ae3c46ebcf4a6d41726e9197d1aa8
<whitequark> sb0: rjo: ok so, what *exactly* is the actual/intended semantics of something like:
<whitequark> d.comb += [ a.eq(b), c.eq(a) ] ?
<whitequark> wait, no, that's not the right question
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpbCp
<_whitenotifier> [m-labs/nmigen] whitequark 7e3cf26 - back.pysim: revert 70ebc6f2.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468150887?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. Absolute coverage decreased by -0.11% but relative coverage increased by +18.82% compared to 71304c9 - https://codecov.io/gh/m-labs/nmigen/commit/7e3cf26cf8dfac6793a9591ccd9dc728e3e56bf0
<_whitenotifier> [nmigen] Success. 90% of diff hit (target 71.17%) - https://codecov.io/gh/m-labs/nmigen/commit/7e3cf26cf8dfac6793a9591ccd9dc728e3e56bf0
<whitequark> hmm
<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/fpbRl
<_whitenotifier> [m-labs/nmigen] whitequark a6a8703 - back.pysim: simplify.
<_whitenotifier> [m-labs/nmigen] whitequark 0015713 - back.pysim: count delta cycles separately to avoid clock drift.
<whitequark> right, so because of the way FSMs are implemented in compat mode, multiple driver detection and design flattening in nmigen is *mandatory*
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468177334?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.1% (+0.03%) compared to 7e3cf26 - https://codecov.io/gh/m-labs/nmigen/commit/0015713bfb061935c93043b18e44974b5043086a
<_whitenotifier> [nmigen] Success. 75% of diff hit (target 71.06%) - https://codecov.io/gh/m-labs/nmigen/commit/0015713bfb061935c93043b18e44974b5043086a
<whitequark> but that's fine i guess
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<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±10] https://git.io/fpbw8
<_whitenotifier> [m-labs/nmigen] whitequark 579feab - fhdl.ir: Fragment.{drive→add_driver}
<_whitenotifier> [m-labs/nmigen] whitequark 2001359 - fhdl.ir: automatically flatten hierarchy to resolve driver conflicts.
<_whitenotifier> [nmigen] whitequark closed issue #5: Detect multiple drivers in different hierarchical modules - https://git.io/fpbqt
<whitequark> woohoo, autoflatten works
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468220323?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.72% (+0.62%) compared to 0015713 - https://codecov.io/gh/m-labs/nmigen/commit/2001359b665afaf82dec0d63df951a3c730169b2
<_whitenotifier> [nmigen] Success. 97.77% of diff hit (target 71.1%) - https://codecov.io/gh/m-labs/nmigen/commit/2001359b665afaf82dec0d63df951a3c730169b2
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpbrc
<_whitenotifier> [m-labs/nmigen] whitequark dba6b0d - fhdl.ast: clean up stub error messages. NFC.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468224645?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 71.63% (-0.1%) compared to 2001359 - https://codecov.io/gh/m-labs/nmigen/commit/dba6b0df948c96b556a31681c75b8bccfa1324ea
<_whitenotifier> [nmigen] Failure. 60% of diff hit (target 71.72%) - https://codecov.io/gh/m-labs/nmigen/commit/dba6b0df948c96b556a31681c75b8bccfa1324ea
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpbrg
<_whitenotifier> [m-labs/nmigen] whitequark 8f06196 - fhdl.ast: clean up stub error messages. NFC.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468225634?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 71.63% (-0.1%) compared to 2001359 - https://codecov.io/gh/m-labs/nmigen/commit/8f06196694fd99cdf14116eecff65ae420390a0a
<_whitenotifier> [nmigen] Failure. 60% of diff hit (target 71.72%) - https://codecov.io/gh/m-labs/nmigen/commit/8f06196694fd99cdf14116eecff65ae420390a0a
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpbr6
<_whitenotifier> [m-labs/nmigen] whitequark c4ba5a3 - fhdl.ast: clean up stub error messages. NFC.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468226636?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.82% (+0.09%) compared to 2001359 - https://codecov.io/gh/m-labs/nmigen/commit/c4ba5a3915426e4c9bebb9cbd7c82ba832ca8a71
<_whitenotifier> [nmigen] Success. 80% of diff hit (target 71.72%) - https://codecov.io/gh/m-labs/nmigen/commit/c4ba5a3915426e4c9bebb9cbd7c82ba832ca8a71
<whitequark> sb0: /home/whitequark/Projects/Glasgow/software/glasgow/gateware/uart.py:231: DriverConflict: Signal '(sig tx_timer)' is driven from multiple fragments: top.dut, top.dut.tx_fsm; hierarchy will be flattened
<d_n|a> bb-m-labs: force build --branch=pull/1209/merge artiq
<bb-m-labs> build forced [ETA 1h03m40s]
<bb-m-labs> I'll give a shout when the build finishes
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpboj
<_whitenotifier> [m-labs/nmigen] whitequark 7108111 - back.pysim: preserve process locations through add_sync_process().
<GitHub-m-labs> [artiq] klickverbot commented on issue #1209: The closest thing to an authoritative source I could find is [this RFC draft on unsafe code guidelines](https://github.com/rust-rfcs/unsafe-code-guidelines/blob/b34616c90fddc699dac005af223ec0ac5b89aae1/reference/src/representation/structs-and-tuples.md), which states:... https://github.com/m-labs/artiq/pull/1209#issuecomment-447509099
<GitHub-m-labs> [artiq] whitequark commented on issue #1209: Yes, tuples are not C ABI compatible and should never be used in extern functions. https://github.com/m-labs/artiq/pull/1209#issuecomment-447509246
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468233242?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 71.68% (-0.14%) compared to c4ba5a3 - https://codecov.io/gh/m-labs/nmigen/commit/7108111ad061750bbaeebe2cd3b95be473e99674
<_whitenotifier> [nmigen] Failure. 46.66% of diff hit (target 71.82%) - https://codecov.io/gh/m-labs/nmigen/commit/7108111ad061750bbaeebe2cd3b95be473e99674
<bb-m-labs> build #2143 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2143
<bb-m-labs> build #2763 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2763