sb0_ changed the topic of #m-labs to: https://m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
<d_n|a> bb-m-labs: force build --branch=pull/1209/head artiq
<bb-m-labs> build forced [ETA 1h03m40s]
<bb-m-labs> I'll give a shout when the build finishes
<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±7] https://git.io/fpbiY
<_whitenotifier> [m-labs/nmigen] whitequark 1c7b43e - Fix deprecations in Python 3.7.
<_whitenotifier> [m-labs/nmigen] whitequark ecea721 - compat.fhdl.module: allow adding native submodules to compat modules.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468243471?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. 71.7% (+0.01%) compared to 7108111 - https://codecov.io/gh/m-labs/nmigen/commit/ecea721f432f8eeb64884f635ee06e721dd57ca0
<_whitenotifier> [nmigen] Failure. 25% of diff hit (target 71.68%) - https://codecov.io/gh/m-labs/nmigen/commit/ecea721f432f8eeb64884f635ee06e721dd57ca0
<_whitenotifier> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpbio
<_whitenotifier> [m-labs/nmigen] whitequark 9010805 - compat.fhdl.structure: handle If/Elif with multi-bit condition.
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468245676?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 71.62% (-0.08%) compared to ecea721 - https://codecov.io/gh/m-labs/nmigen/commit/9010805040ee59629002ada1b9ab9dc3bb29761a
<_whitenotifier> [nmigen] Failure. 0% of diff hit (target 71.7%) - https://codecov.io/gh/m-labs/nmigen/commit/9010805040ee59629002ada1b9ab9dc3bb29761a
<bb-m-labs> build #2144 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2144
<bb-m-labs> build #2764 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2764
<d_n|a> bb-m-labs: force build --branch=pull/1209/head artiq
<bb-m-labs> build forced [ETA 1h03m40s]
<bb-m-labs> I'll give a shout when the build finishes
<d_n|a> Sigh, sorry about the noise - I'm halfway through a two-way merge, so I can't trivially test this locally...
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<mithro> whitequark: I got distracted yesterday, but I did think I managed to signup to the notifier I think...
<bb-m-labs> build #2145 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2145
<bb-m-labs> build #2146 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2146
<bb-m-labs> build #970 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/970
<bb-m-labs> build #2765 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2765
<GitHub-m-labs> [artiq] klickverbot pushed 2 new commits to master: https://github.com/m-labs/artiq/compare/38ce7ab8ff6c...e608d6ffd3b3
<GitHub-m-labs> artiq/master e608d6f David Nadlinger: coredevice, firmware: Add rtio_input_timestamped_data...
<GitHub-m-labs> artiq/master 8e30c45 David Nadlinger: firmware: Treat timestamps consistently as signed [nfc]...
<bb-m-labs> build #2147 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2147
<bb-m-labs> build #2148 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2148
<bb-m-labs> build #971 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/971
<bb-m-labs> build #2766 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2766
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<whitequark> sb0: ping
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<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 3 commits to master [+1/-1/±5] https://git.io/fpbFH
<_whitenotifier-4> [m-labs/nmigen] whitequark f5e8c90 - fhdl.ir: fix incorrect uses of positive to say non-negative.
<_whitenotifier-4> [m-labs/nmigen] whitequark f9f7921 - fhdl.ir: test iter_comb(), iter_sync() and iter_signals().
<_whitenotifier-4> [m-labs/nmigen] whitequark 3a8685c - Consistently use '{!r}' in and only in TypeError messages.
<_whitenotifier-4> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468341258?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. 73.32% (+1.7%) compared to 9010805 - https://codecov.io/gh/m-labs/nmigen/commit/3a8685c3523cdff7c2d684e60e5157f619097ca2
<_whitenotifier-4> [nmigen] Success. 81.81% of diff hit (target 71.62%) - https://codecov.io/gh/m-labs/nmigen/commit/3a8685c3523cdff7c2d684e60e5157f619097ca2
<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 3 commits to master [+0/-0/±8] https://git.io/fpbbX
<_whitenotifier-4> [m-labs/nmigen] whitequark 46f5add - fhdl.ast: refactor Operator.shape(). NFC.
<_whitenotifier-4> [m-labs/nmigen] whitequark db4600d - fhdl.ast, back.pysim: implement shifts.
<_whitenotifier-4> [m-labs/nmigen] whitequark b70340c - pyback.sim: test Slice, Cat, Repl.
<_whitenotifier-4> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468347378?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. 76.36% (+3.04%) compared to 3a8685c - https://codecov.io/gh/m-labs/nmigen/commit/b70340c0daf619549d46e72b8d05c81c90269f44
<_whitenotifier-4> [nmigen] Success. Coverage not affected when comparing 3a8685c...b70340c - https://codecov.io/gh/m-labs/nmigen/commit/b70340c0daf619549d46e72b8d05c81c90269f44
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<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 1 commit to master [+5/-0/±2] https://git.io/fpbxr
<_whitenotifier-4> [m-labs/nmigen] whitequark 8522384 - Determine Migen's API surface and document compatibility summary.
<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 1 commit to master [+5/-0/±2] https://git.io/fpbxK
<_whitenotifier-4> [m-labs/nmigen] whitequark fadaa5a - Determine Migen's API surface and document compatibility summary.
<_whitenotifier-4> [nmigen] Error. The Travis CI build could not complete due to an error - https://travis-ci.org/m-labs/nmigen/builds/468368431?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 1 commit to master [+5/-0/±2] https://git.io/fpbx6
<_whitenotifier-4> [m-labs/nmigen] whitequark 1f10bd9 - Determine Migen's API surface and document compatibility summary.
<_whitenotifier-4> [nmigen] Error. The Travis CI build could not complete due to an error - https://travis-ci.org/m-labs/nmigen/builds/468368626?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468368746?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. 76.36% (+0%) compared to b70340c - https://codecov.io/gh/m-labs/nmigen/commit/1f10bd96b92f16b16dffe6f969cbdc03a931f7ee
<_whitenotifier-4> [nmigen] Success. 100% of diff hit (target 76.36%) - https://codecov.io/gh/m-labs/nmigen/commit/1f10bd96b92f16b16dffe6f969cbdc03a931f7ee
<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpbpf
<_whitenotifier-4> [m-labs/nmigen] whitequark cc96a7e - doc: update COMPAT_SUMMARY to reflect actual status.
<_whitenotifier-4> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468372683?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. 76.36% remains the same compared to 1f10bd9 - https://codecov.io/gh/m-labs/nmigen/commit/cc96a7ecfa16e0fa8cba220cac2f947aa5f84376
<_whitenotifier-4> [nmigen] Success. Coverage not affected when comparing 1f10bd9...cc96a7e - https://codecov.io/gh/m-labs/nmigen/commit/cc96a7ecfa16e0fa8cba220cac2f947aa5f84376
<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpbpU
<_whitenotifier-4> [m-labs/nmigen] whitequark c5ffbed - doc: fix some Markdown awkwardness.
<_whitenotifier-4> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468372948?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. 76.36% remains the same compared to cc96a7e - https://codecov.io/gh/m-labs/nmigen/commit/c5ffbed27b8a96d4cb9fa9f456f2d37458777ef4
<_whitenotifier-4> [nmigen] Success. Coverage not affected when comparing cc96a7e...c5ffbed - https://codecov.io/gh/m-labs/nmigen/commit/c5ffbed27b8a96d4cb9fa9f456f2d37458777ef4
<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/fpbpm
<_whitenotifier-4> [m-labs/nmigen] whitequark ad3c888 - doc: fix some Markdown awkwardness.
<_whitenotifier-4> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468373275?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. 76.36% remains the same compared to cc96a7e - https://codecov.io/gh/m-labs/nmigen/commit/ad3c88852fd9ee2fcb14732170b3c92c8e373ccf
<_whitenotifier-4> [nmigen] Success. Coverage not affected when comparing cc96a7e...ad3c888 - https://codecov.io/gh/m-labs/nmigen/commit/ad3c88852fd9ee2fcb14732170b3c92c8e373ccf
<_whitenotifier-4> [nmigen] whitequark opened issue #6: Implement remaining core Migen features - https://git.io/fpbpZ
<_whitenotifier-4> [nmigen] whitequark edited issue #6: Implement remaining core Migen features - https://git.io/fpbpZ
<_whitenotifier-4> [nmigen] whitequark edited issue #6: Implement remaining core Migen features - https://git.io/fpbpZ
<rjo> d_n|a: feel free to upstream your changes more often to prevent divergence ;)
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<_whitenotifier-4> [nmigen] whitequark edited issue #6: Implement remaining core Migen features - https://git.io/fpbpZ
<_whitenotifier-4> [nmigen] whitequark edited issue #6: Implement remaining core Migen features - https://git.io/fpbpZ
<_whitenotifier-4> [nmigen] whitequark edited issue #6: Implement remaining core Migen features - https://git.io/fpbpZ
<_whitenotifier-4> [nmigen] whitequark edited issue #6: Implement remaining core Migen features - https://git.io/fpbpZ
<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 2 commits to master [+9/-9/±26] https://git.io/fpNv5
<_whitenotifier-4> [m-labs/nmigen] whitequark b5a1efa - Move star imports to make `from nmigen import *` usable.
<_whitenotifier-4> [m-labs/nmigen] whitequark 790eb05 - Rename fhdl→hdl, genlib→lib.
<_whitenotifier-4> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468409429?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. Absolute coverage decreased by -0.37% but relative coverage increased by +23.63% compared to ad3c888 - https://codecov.io/gh/m-labs/nmigen/commit/790eb05a920bed17df985327971cf75428d8852d
<_whitenotifier-4> [nmigen] Success. 100% of diff hit (target 76.36%) - https://codecov.io/gh/m-labs/nmigen/commit/790eb05a920bed17df985327971cf75428d8852d
<whitequark> rjo: I have a concern about Array
<whitequark> right now it inherits from List
<whitequark> but if you modify it after you index into it, you silently get a big
<whitequark> *bug
<whitequark> rjo: IMO Array should inherit from collections.abc.MutableSequence, and disallow mutation after being indexed into once
<whitequark> opinion?
<sb0> whitequark: pong
<whitequark> sb0: already figured it out (bit width of <</>> result)
<sb0> whitequark: so when there is a FSM, what gets flattened eactly?
<whitequark> sb0: FSM into its parent submodule
<whitequark> the reason is that e.g. in an UART I have a timer that ticks independently but is reset from the FSM
<whitequark> so, both UART container module and TX FSM drive that signal
<whitequark> this is now automatically detected and resolved for all cases, with three selectable levels: silent, warn, error (on conflict)
<whitequark> default is warn
<whitequark> /home/whitequark/Projects/Glasgow/software/glasgow/gateware/uart.py:231: DriverConflict: Signal '(sig tx_timer)' is driven from multiple fragments: top.dut, top.dut.tx_fsm; hierarchy will be flattened
<whitequark> tx_timer = Signal(max=bit_cyc)
<whitequark> looks like this
<sb0> because otherwise each FSM would have its own module?
<whitequark> yes, because compat FSMs are submodules
<whitequark> it's just the old migen implementation
<sb0> okay, but with the "new" FSM this isn't the case?
<whitequark> the new FSM will lower directly to the yosys $fsm cell
<whitequark> it is not a submodule, although the details are a bit fuzzy
<whitequark> it works more like an instance
<sb0> can that be exported to verilog in a nice way?
<whitequark> should be
<whitequark> if not I'll just expand it in a pass
<whitequark> sb0: btw I am implementing arrays now, any wishes?
<whitequark> other than fixing the hazard with mutation
<sb0> not really
<sb0> by mutation you mean changing the array itself? I guess there is no way to prevent mutation in the elements of the array to
<whitequark> of course there is
<whitequark> inherit from collections.abc.MutableSequence and forward 4 methods
<whitequark> to the actual array inside
<whitequark> then, once you create the first proxy, flip a flag.
<sb0> but if you have a reference to some object that becomes part of the Array, you can still mutate that object via the reference, right?
<whitequark> what I wanted to do is to make ArrayProxy lazy
<whitequark> but not completely lazy
<whitequark> it would check that __getattr__ or __getitem__ succeeds
<whitequark> and then remember the path
<whitequark> now there is only a hazard of substituting an incompatible object by mutating an array element
<sb0> you need python 3.7 for nmigen?
<whitequark> it's like one function, but I haven't bothered to change it
<whitequark> 3.6 is definitely doable
<whitequark> 3.5 might be not doable if we decide to go with asyncio in the simulator
<whitequark> because 3.6 introduces async generators
<sb0> 3.7 should be fine, just checking
<sb0> python asyncio is slow and a bit messy
<whitequark> so I've been using asyncio and migen simulator together extensively in glasgow
<whitequark> it is really useful
<sb0> what does asyncio bring to the simulator that generators/"yield from" don't?
<sb0> convenient syntax additions and some error checking?
<whitequark> no
<whitequark> error checking is already done in back.pysim
<whitequark> nmigen pysim should never give you an obscure error with a broken backtrace now.
<whitequark> actually it will interleave frames of pysim and user generator
<sb0> oh I mean stupid errors like "x = foo()" instead of "x = yield from foo()"
<whitequark> ah, no
<whitequark> you would still use yield and yield from for migen simulator
<whitequark> but you could *also* use asyncio
<whitequark> so in glasgow, imagine there is an SPI applet that talks to the SPI core in the device via a FIFO
<whitequark> when running the applet, it is done by an asyncio wrapper around python-libusb
<whitequark> but when simulating this together, you do not want to change the applet just for simulation
<whitequark> so, it is good if in the same function, you can interleave calls to asyncio that put data into the "host" side of FIFO, and calls to migen simulator that pull data from "device" side of FIFO
<whitequark> verilator module style
<whitequark> this way, you can run e.g. actual SPI flash applet code against the actual applet gateware, and see it all in gtkwave, with zero sim specific changes
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<whitequark> sb0: what is the intended behavior of a 3-element array proxy being indexed with index 3?
<whitequark> I am tempted to make it output x's
<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 3 commits to master [+5/-5/±4] https://git.io/fpNLC
<_whitenotifier-4> [m-labs/nmigen] whitequark f603b73 - hdl.ast: improve ClockSignal, ResetSignal documentation.
<_whitenotifier-4> [m-labs/nmigen] whitequark c6e7a93 - hdl: appropriately rename tests. NFC.
<_whitenotifier-4> [m-labs/nmigen] whitequark 1580b6e - Lower Python version requirement to 3.6.
<_whitenotifier-4> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468447111?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. 75.99% remains the same compared to 790eb05 - https://codecov.io/gh/m-labs/nmigen/commit/1580b6e542a5ae2b1951d620973b684e56b91efd
<_whitenotifier-4> [nmigen] Success. Coverage not affected when comparing 790eb05...1580b6e - https://codecov.io/gh/m-labs/nmigen/commit/1580b6e542a5ae2b1951d620973b684e56b91efd
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<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±9] https://git.io/fpNOt
<_whitenotifier-4> [m-labs/nmigen] whitequark 80c5343 - hdl.ast: implement Array and ArrayProxy.
<_whitenotifier-4> [m-labs/nmigen] whitequark 54fb999 - back.pysim: implement ArrayProxy.
<_whitenotifier-4> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468481069?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. 76.64% (+0.65%) compared to 1580b6e - https://codecov.io/gh/m-labs/nmigen/commit/54fb999c9966121b4feae2034c78c3d9988749b1
<_whitenotifier-4> [nmigen] Success. 76.92% of diff hit (target 75.99%) - https://codecov.io/gh/m-labs/nmigen/commit/54fb999c9966121b4feae2034c78c3d9988749b1
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<_whitenotifier-4> [m-labs/nmigen] whitequark pushed 3 commits to master [+2/-2/±4] https://git.io/fpNsl
<_whitenotifier-4> [m-labs/nmigen] whitequark 6c601fe - doc: update COMPAT_SUMMARY.
<_whitenotifier-4> [m-labs/nmigen] whitequark 1adf58f - examples: rename clkdiv/ctrl to ctr/ctr_ce.
<_whitenotifier-4> [m-labs/nmigen] whitequark 20a04bc - back.pysim: implement Part.
<_whitenotifier-4> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/468499157?utm_source=github_status&utm_medium=notification
<_whitenotifier-4> [nmigen] Success. 76.94% (+0.29%) compared to 54fb999 - https://codecov.io/gh/m-labs/nmigen/commit/20a04bca882fe7d56085a475a6bd556fba559713
<_whitenotifier-4> [nmigen] Success. 100% of diff hit (target 76.64%) - https://codecov.io/gh/m-labs/nmigen/commit/20a04bca882fe7d56085a475a6bd556fba559713
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