sb0 changed the topic of #m-labs to: https://m-labs.hk :: Mattermost https://chat.m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
<_whitenotifier> [nmigen] programmerjake commented on issue #145: pypy3 support tracking issue - https://git.io/Jem3W
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<_whitenotifier> [nmigen] RobertBaruch commented on issue #202: Add Value.match(...), an operator with the same semantics as Case(...) - https://git.io/Jemns
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<_whitenotifier> [nmigen] RobertBaruch commented on issue #202: Add Value.match(...), an operator with the same semantics as Case(...) - https://git.io/Jemnw
<_whitenotifier> [nmigen] RobertBaruch opened pull request #203: Accepts '?' in Case, maps to '-' - https://git.io/Jemnx
<_whitenotifier> [nmigen] RobertBaruch commented on issue #202: Add Value.match(...), an operator with the same semantics as Case(...) - https://git.io/Jemnp
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/583483800?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] codecov[bot] commented on pull request #203: Accepts '?' in Case, maps to '-' - https://git.io/JemcO
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/583483800?utm_source=github_status&utm_medium=notification
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<rjo> cjbe: yes. i worked with it a bit. IIRD i commented on the issues on github where people tried this. you have to wade through and enable that funnel stuff.
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<harryho> whitequark: Thanks for opening up the discussion! I didn't know what SVD format is. Is that basically an XML format to represent the CSRs in a way that Rust code, after generating a library from the SVD with `svd2rust`, can access these peripherals "safely" (ie without the need to specify the addresses)? And the JSON format to be exported from CSRBanks, is that gonna be exactly like the SVD format, and what programs will use those JSONs?
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<_whitenotifier> [nmigen] whitequark commented on issue #202: Add Value.match(...), an operator with the same semantics as Case(...) - https://git.io/Jem8g
<_whitenotifier> [nmigen] whitequark commented on issue #145: pypy3 support tracking issue - https://git.io/Jem4v
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<whitequark> harryho: SVD format: yes
<whitequark> JSON format: no, it won't be like SVD at all. the JSON would be equivalent in structure to whatever nmigen-soc is doing internally, so that register info can be serialized, loaded later, and (for example) code generated from it
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<_whitenotifier> [smoltcp] whitequark commented on issue #305: panic decoding DHCP domain name server option - https://git.io/JemR6
<_whitenotifier> [nmigen] whitequark commented on issue #202: Add Value.match(...), an operator with the same semantics as Case(...) - https://git.io/JemRb
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<_whitenotifier> [smoltcp] cjbe commented on issue #305: panic decoding DHCP domain name server option - https://git.io/Jema5
<_whitenotifier> [smoltcp] whitequark commented on issue #305: panic decoding DHCP domain name server option - https://git.io/JemwW
<_whitenotifier> [nmigen] RobertBaruch commented on issue #202: Add Value.match(...), an operator with the same semantics as Case(...) - https://git.io/JemwF
<_whitenotifier> [nmigen] RobertBaruch commented on issue #202: Add Value.match(...), an operator with the same semantics as Case(...) - https://git.io/Jemrt
<_whitenotifier> [nmigen] whitequark commented on issue #202: Add Value.match(...), an operator with the same semantics as Case(...) - https://git.io/Jemrm
<kernlbob_> I tried to instantiate an iCE40 SB_PLL_PAD. It failed because the modules wants a pin, but nMigen inserted an SB_IO. Any suggestions? https://pastebin.com/aZpkDVzq Thanks.
<cr1901_modern> plat.request("name", dir="-")
<cr1901_modern> This will give you a pin that doesn't insert an SB_IO
<kernlbob_> cr1901_modern IT BLINKS! Thank you so much!
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<_whitenotifier> [nmigen] RobertBaruch commented on issue #202: Add Value.match(...), an operator with the same semantics as Case(...) - https://git.io/JemDu
<_whitenotifier> [nmigen] RobertBaruch closed pull request #203: Accepts '?' in Case, maps to '-' - https://git.io/Jemnx
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<_whitenotifier> [m-labs/nmigen-boards] whitequark pushed 2 commits to master [+0/-0/±2] https://git.io/JemDQ
<_whitenotifier> [m-labs/nmigen-boards] whitequark bd540f8 - Fix .gitignore.
<_whitenotifier> [m-labs/nmigen-boards] whitequark b5bc34d - atlys: fix typo.
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<_whitenotifier> [m-labs/nmigen] whitequark pushed 2 commits to master [+0/-0/±7] https://git.io/JemDN
<_whitenotifier> [m-labs/nmigen] whitequark d1779bd - back: return name map from convert_fragment().
<_whitenotifier> [m-labs/nmigen] whitequark 8c30147 - build.plat,vendor: allow clock constraints on arbitrary signals.
<_whitenotifier> [nmigen] whitequark commented on issue #88: Signal names are not translated for constraints, etc. - https://git.io/JemDA
<_whitenotifier> [nmigen] whitequark commented on issue #200: nextpnr clock constraints - https://git.io/JemDp
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<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/583909312?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Success. The Travis CI build passed - https://travis-ci.org/m-labs/nmigen/builds/583909312?utm_source=github_status&utm_medium=notification
<_whitenotifier> [nmigen] Failure. 82.8% (-0.04%) compared to 7342662 - https://codecov.io/gh/m-labs/nmigen/commit/8c30147e39ccc19294ab2d62888dc1e70b0672b5
<_whitenotifier> [nmigen] Failure. 0% of diff hit (target 82.84%) - https://codecov.io/gh/m-labs/nmigen/commit/8c30147e39ccc19294ab2d62888dc1e70b0672b5
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