sb0 changed the topic of #m-labs to: https://m-labs.hk :: Mattermost https://chat.m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
<cr1901_modern> To clarify, I didn't _like_ telling said person to "knock it off"; they had valid feedback. But I needed a break and I did a poor job hiding it. Maybe it depends on my mental bandwidth.
<_whitenotifier> [nmigen] RobertBaruch commented on issue #206: Enhancing the FSM sub-language - https://git.io/JeYMA
<_whitenotifier> [nmigen] whitequark commented on issue #207: First-class enumerated signals - https://git.io/JeYMx
<_whitenotifier> [nmigen] whitequark commented on issue #206: Enhancing the FSM sub-language - https://git.io/JeYMp
<emily> I think RobertBaruch is making valuable contributions to the language to make it work for large-scale designs and, I mean, whitequark is literally a full-time professional programming language designer/compiler engineer
<emily> but I agree it can be excessive for personal projects and the like
<emily> I think issues can be valuable just as a note to any other contributor who might want to come along and do things... but if you're the only person working on it, people's expectations and entitlement can be rough, yeah.
<cr1901_modern> This was a personal project in my case, yes. And me getting paid to work on it is/was pretty slim.
<_whitenotifier> [nmigen] RobertBaruch commented on issue #207: First-class enumerated signals - https://git.io/JeYDJ
<cr1901_modern> >I think RobertBaruch is making valuable contributions to the language to make it work for large-scale designs <-- I also agree with this
<whitequark> I would be full-time if M-Labs actually paid me for it as a full-time developer, which is not the case
<whitequark> but otherwise I agree
<_whitenotifier> [nmigen] RobertBaruch opened issue #208: How do I simulate? - https://git.io/JeYDC
<_whitenotifier> [nmigen] whitequark commented on issue #208: How do I simulate? - https://git.io/JeYDW
<_whitenotifier> [nmigen] RobertBaruch commented on issue #208: How do I simulate? - https://git.io/JeYDB
<_whitenotifier> [nmigen] RobertBaruch closed issue #208: How do I simulate? - https://git.io/JeYDC
<_whitenotifier> [nmigen] whitequark commented on issue #207: First-class enumerated signals - https://git.io/JeYDR
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<_whitenotifier> [nmigen] RobertBaruch commented on issue #208: How do I simulate? - https://git.io/JeYDV
<_whitenotifier> [nmigen] whitequark commented on issue #208: How do I simulate? - https://git.io/JeYDr
<_whitenotifier> [nmigen] RobertBaruch commented on issue #206: Enhancing the FSM sub-language - https://git.io/JeYD7
<_whitenotifier> [nmigen] RobertBaruch commented on issue #207: First-class enumerated signals - https://git.io/JeYDA
<_whitenotifier> [nmigen] whitequark commented on issue #207: First-class enumerated signals - https://git.io/JeYDp
<mtrbot-ml> [mattermost] <sb10q> @astro I should be able to go to the lab today
<mtrbot-ml> [mattermost] <sb10q> @hartytp is there another board that could be sent to @astro?
<mtrbot-ml> [mattermost] <sb10q> have you done the analog tests already?
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<_whitenotifier> [nmigen] programmerjake commented on issue #206: Enhancing the FSM sub-language - https://git.io/JeYSc
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<Dar1us> ugh figured out my problem, the resulting bit file is fine, but the Digilent programming tool doesn't work properly. Programming using impact & hw_server (with the same cable) works
<mtrbot-ml> [mattermost] <sb10q> @astro power cycled it
<mtrbot-ml> [mattermost] <sb10q> and checked it works again...
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<mtrbot-ml> [mattermost] <hartytp> @sb10q I only have one left for testing
<mtrbot-ml> [mattermost] <hartytp> Can’t you send him the one you have?
<mtrbot-ml> [mattermost] <hartytp> @sb10q working on analog tests, finishing understanding what the code does atm, checking what reg writes there are/need to be etc
<mtrbot-ml> [mattermost] <hartytp> Getting there
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<ZirconiumX> ValueError: Process 'pcrtc.py:222' sent a request to set signal '(sig synch1_hsvs)', which is not a part of simulation
<ZirconiumX> What's this supposed to mean?
<whitequark> well... exactly what it says? it's a signal you neither read nor write anywhere in your design
<whitequark> so you can't set it from a process.
<ZirconiumX> Maybe it could be worded a little better?
<ZirconiumX> "which is not referenced in design", maybe?
<whitequark> hm, sure
<ZirconiumX> Also, I caused another bug by being incompetent
<ZirconiumX> This happens when you try to read a signal in a testcase when the design never writes to it
<whitequark> no, that's an nmigen bug
<ZirconiumX> (I forgot the "m.d.sync += [")
<_whitenotifier> [nmigen] RobertBaruch commented on issue #207: First-class enumerated signals - https://git.io/JeYAJ
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<_whitenotifier> [nmigen] RobertBaruch opened issue #209: Formatting settings? - https://git.io/JeYAK
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<_whitenotifier> [nmigen] whitequark commented on issue #209: Formatting settings? - https://git.io/JeYAA
<_whitenotifier> [nmigen] cr1901 commented on issue #209: Formatting settings? - https://git.io/JeYx3
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<_whitenotifier> [nmigen] whitequark commented on issue #209: Formatting settings? - https://git.io/JeYxl
<_whitenotifier> [nmigen] RobertBaruch commented on issue #209: Formatting settings? - https://git.io/JeYxV
<_whitenotifier> [nmigen] whitequark commented on issue #209: Formatting settings? - https://git.io/JeYx6
<_whitenotifier> [nmigen] whitequark closed issue #209: Formatting settings? - https://git.io/JeYAK
<_whitenotifier> [nmigen] whitequark commented on issue #209: Formatting settings? - https://git.io/JeYxP
<_whitenotifier> [nmigen] RobertBaruch commented on issue #209: Formatting settings? - https://git.io/JeYx7
<_whitenotifier> [nmigen] whitequark commented on issue #209: Formatting settings? - https://git.io/JeYxF
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<_whitenotifier> [nmigen] RobertBaruch commented on issue #209: Formatting settings? - https://git.io/JeYpH
<_whitenotifier> [nmigen] whitequark commented on issue #209: Formatting settings? - https://git.io/JeYpd
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<kernlbob_> A long time ago, migen (classic) had a submodule migen.actor. It was removed from the repo in 2015-09. Was it a bad design? Did something better replace it?
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