<lekernel>
then we can handle None in the Instance IOs
<lekernel>
eg treat it as 0 for inputs and disconnected for outputs
<_florent_>
yes why not, it will be almost the same since in the module I'm only instanciating the verilog
<lekernel>
if you want to pass a different default you can use eg Instance.Input("port", value or 2)
<_florent_>
yes, can be interesting
<lekernel>
I'd like to keep the Modules with IO signals as members...
<_florent_>
In fact I was having an issue with my code:
<_florent_>
when I was using self.submodules.oddr = oddr.ODDR(c=self.clk, d1=1, d2=0, q=self.hdmi_clk)
<_florent_>
I want that ce, s and r use their default values which is not the case.
<_florent_>
In verilog.py in the printinit function, the instances input are not initialized
<_florent_>
but it's maybe something that would be solved with what you suggested
<lekernel>
ah, that's a bug
<lekernel>
but I'm actually refactoring that code right now, and that problem should be solved
<lekernel>
and yes the function option would resolve this as well
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<_florent_>
ok so I will try to change my module to functions
<lekernel>
the original bug that refactoring was supposed to solve is you cannot use Array() in Instance expressions
<_florent_>
ok
<lekernel>
so you doing the HDMI out?
<_florent_>
thanks for the advices
<_florent_>
i'm trying to use the ADV7511 on the KC705
<lekernel>
maybe you should put all the functions in a single Python module, so you don't have too many imports and files
<_florent_>
but it's not working for the moment
<lekernel>
ah
<_florent_>
I have to do simulation
<lekernel>
I wonder why they added that chip
<lekernel>
kintex 7 io can do TMDS, no?
<lekernel>
maybe for 225MHz (2250Gbps data rate, iirc k7 can only do 1800)? I wonder why FPGA vendors only seem to be able to make only slow IOs, even in 28nm devices :(
<_florent_>
I don't know about TDMS on kintex7
<lekernel>
s/Gbps/Mbps
<_florent_>
yes I remember that for the DDR the IOs were limited to 1800 or 1600
<_florent_>
for the moment I'm trying to figure how to configure the ADV7511... don't seems to be easy
<_florent_>
but that's a spare time project so I'm not going very fast...
<lekernel>
how about hooking up a HDMI cable to the IO expansion header and driving TMDS directly?
<_florent_>
ah ok
<lekernel>
I'm doing a HDMI receiver... there won't be much, if anything, in common
<_florent_>
I'm waiting for your HDMI extension to work and after that why not ;) !
<lekernel>
DVI signaling is a mere 8b10b encoding of the VGA samples
<lekernel>
this way you don't depend on some proprietary chip
<_florent_>
I was thinking i was doing both
<_florent_>
after the ADV7511 configuration I will need a ddr controller...
<_florent_>
but it will be another story
<lekernel>
you can try it with a generated pattern first
<_florent_>
yes that what I'm planning to do
<lekernel>
my first vga-out was on a cyclone 2 with no sdram and not even a dac :) just used a few resistors
<_florent_>
the same for me on a altera de1
<_florent_>
I have to return to work..
<_florent_>
thanks for the advices
<_florent_>
I will try to use function instead of Module
<_florent_>
bye
<lekernel>
bye!
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<larsc>
lekernel: the chip was added so we can sell it of course ;)
<lekernel>
yeah I picked that up...
<larsc>
but the same is on all the xilinx boards
<lekernel>
same for the tmds chip on the atlys I guess
<lekernel>
but from TI this time
<larsc>
they used TI before but switched to AD for all the newer boards
<lekernel>
at least it has a purpose on the kc705: compensate a bit for the super-slow FPGA IOBs
<lekernel>
on the atlys it's completely useless afaict
<lekernel>
it provides some electrical protection for the FPGA, but you could do the same with TVS diodes
<larsc>
got a sick-note for the next two weeks, so lots of time for migen hacking ;)