08:54 <GitHub36> [milkymist-ng] sbourdeauducq pushed 3 new commits to master: http://git.io/22KiuQ

08:54 <GitHub36> milkymist-ng/master fe87221 Sebastien Bourdeauducq: dvisampler/dma: reverse slot allocation order

08:54 <GitHub36> milkymist-ng/master c6d553e Sebastien Bourdeauducq: software/videomixer: interrupt-driven video passthrough

08:54 <GitHub36> milkymist-ng/master 2df4ff0 Sebastien Bourdeauducq: dvisampler/dma: fix interrupt generation

11:03 <bhamilton> lekernel: Can you give quick explanation of CSR, CSRStatus and CSRStorage in migen?

11:17 <lekernel> csr is the base type that corresponds to one memory location with we and r/w signals

11:18 <lekernel> csrstatus is a register read-only for the cpu; the important feature over csr is that it can occupy several memory locations when it's wider than the bus

11:18 <lekernel> csrstorage is a regular r/w memory location for the cpu, with the current value available in a signal for the design

11:19 <bhamilton> thanks

11:43 <GitHub199> [milkymist-ng] sbourdeauducq pushed 2 new commits to master: http://git.io/SF9Log

11:43 <GitHub199> milkymist-ng/master 546aa76 Sebastien Bourdeauducq: software/dvimixer: support two channels

11:43 <GitHub199> milkymist-ng/master 06064d3 Sebastien Bourdeauducq: dvisampler/dma: better 8:8:8 -> 10:10:10 conversion

12:13 <GitHub39> [milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/UR_eig

12:13 <GitHub39> milkymist-ng/master 6f11ddb Sebastien Bourdeauducq: software/dvisampler: periodically reset PLL until locked + recalibrate IO every second

17:25 <GitHub79> [milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/5N-doA

17:25 <GitHub79> milkymist-ng/master 3ab83fb Sebastien Bourdeauducq: framebuffer: reorganize in preparation for mixer

20:56 <Fallenou> isn't it dangerous that the first instruction of lm32 exception vector is: sw (sp+0), ra ?

20:57 <Fallenou> sp is controlled by the user space program (if the exception is triggered when a user space program was running)

20:57 <Fallenou> it could be any value, especially a terribly wrong one

20:57 <Fallenou> or I am misunderstanding something...

21:00 <Fallenou> on the other hand, I don't understand how one would save registers if not pushing them on the stack...

21:00 <Fallenou> maybe we need to implement "exception register bank" or shadow registers

21:11 <larsc> The linux kernel is using r0 for this

21:11 <Fallenou> for system calls it seems to be using sp

21:12 <larsc> no, first thing we do is switch to kernel stack

21:13 <Fallenou> https://github.com/milkymist/linux-milkymist/blob/ng/arch/lm32/kernel/entry.S#L174 < is this the up to date code?

21:14 <larsc> probably not

21:14 <larsc> try the master branch

21:14 <Fallenou> oh, ok

21:15 <Fallenou> ok, it's different on master branch :)

21:15 <Fallenou> indeed there is a switch_to_kernel_mode

21:17 <Fallenou> so you use r0 to write to a precise address the value of r9 r10 r11 in order to be able to use them afterward without losing previous value

21:17 <Fallenou> then you restore r0 to 0

21:17 <Fallenou> nice :)

21:20 <Fallenou> let's do the same trick for NetBSD then

21:20 <Fallenou> thanks

21:38 <Fallenou> gn8!