lekernel changed the topic of #milkymist to: Milkymist One, Migen, Milkymist SoC & Flickernoise :: Logs: http://en.qi-hardware.com/mmlogs
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<lekernel> are there special power dissipation limits when using IN_TERM=UNTUNED_SPLIT_xx?
<lekernel> eg with UNTUNED_SPLIT_25, you can have up to 545mW dissipation per IO (at 3.3V), which is quite a lot
<lekernel> do that on all the M1's FPGA pins and it dissipates 172W :) (or lets the magic smoke out before)
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<lekernel> larsc, do you have access to a scope that can probe the high speed hdmi signals?
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<larsc> how highspeed?
<larsc> but we have some fancy scopes at work
<lekernel> 250Mbps
<larsc> maybe
<lekernel> so you need a 2GHz scope at least
<larsc> I'd need to take a look at the specs
<larsc> btw. maxim wouldn't let me order samples, I think I'm going with the ADI replacement part
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<GitHub126> [milkymist-ng] sbourdeauducq pushed 1 new commit to master: http://git.io/v08ZLw
<GitHub126> milkymist-ng/master 8c335d6 Sebastien Bourdeauducq: framebuffer: fix alpha blending
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<GitHub69> [migen] sbourdeauducq pushed 2 new commits to master: http://git.io/TNCBvA
<GitHub69> migen/master 955a973 Sebastien Bourdeauducq: Revert "genlib/record/connect: add match_by_position"...
<GitHub69> migen/master 0ec6a7e Sebastien Bourdeauducq: genlib/record: match_by_position -> connect_flat
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<lekernel> hi cladamw
<lekernel> welcome back
<lekernel> larsc, (samples) interesting, I got them in a few days, no questions asked
<lekernel> are you shipping them to ADI? ;)
<lekernel> they're available at mouser too
<larsc> lekernel: yea, they didn't want to sent them because I was flaged as an employee of competitor
<lekernel> by the way, do you know why all those LVDS->LVCMOS converters are so slow? not realistic to have higher bitrates on single ended signals?
<larsc> no idea
<lekernel> SSTL (DDR etc.) is single ended and pretty fast
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<lekernel_> it seems 24 ohm series resistors near the outputs of the max9121 improve things
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<larsc> hm, no such thing as the empty vector :/
<lekernel_> ?
<larsc> I want to make a core with a variable sized signal, turns out you can't make a 0 sized vector in vhdl
<lekernel_> use migen ;) (I have to say zero-sized signals don't work either, but you can send a patch ;)
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<larsc> maybe, someday
<larsc> for now it is mostly working and the last step is to just add support for multiple input signals
<lekernel_> what is it?
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<larsc> a i2s core
<larsc> we have a board with a couple of i2s microphones
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<Fallenou> 19:56 < lekernel> Fallenou_, has Alarm assembled the two PCBs I sent, or are those board wasted? < lekernel_ < last time I spoke with him (this week) he told me he was going to assemble them and then we could meet so that he could give me one
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