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<
Lofty>
Summoning Sarayan
<
Sarayan>
Ah cute, never noticed that osc
<
Sarayan>
I'll have to check
<
daveshah>
I'd be curious how accurate the oscillator is
<
daveshah>
The best FPGA internal oscillators tend to be +/-5%
<
daveshah>
The worst on the order of +/-30%
<
daveshah>
Actually, is it possible the intent is to use a clock that is connected to the SoC part?
<
daveshah>
I've seen Zynq boards where the clock is intended to come through an oscillator connected to the SoC
<
Lofty>
The FPGA and ARM appear to be in different clock domains
<
daveshah>
Even so, I know Xilinx have some PLL outputs from the SoC that drive fabric
<
omnitechnomancer>
Yea Zynq has clocks from the PS to the PL that can be used
<
daveshah>
My guess is it is the same deal here
<
daveshah>
Surely they can't just expect you to use the internal oscillator, as invariably they aren't accurate enough for a lot of protocols
<
Lofty>
Guess we'll find out eventually