13:31 <sf-slack> <bmalbusca> Hello! I'm a Embedded SW/HW developer with experience in PCB Design and in programming languages such as Python and C/C++. I 'm looking to contribute to a project like Symbiflow, and I really feel the need to have a powerful open-source FPGA at affordable prices. What'd I miss? Where can I get started? I saw the presentation of this project and I'm very motivated to make a

13:31 <sf-slack> contribution.

15:57 <_whitenotifier-b> [FPGA-Tool-Performance-Visualization-Library] TypingKoala opened issue #19: Add support for hydrafetcher getting by absolute eval id - https://git.io/JJ62w

16:10 <sf-slack> <bmalbusca> Is that true? I saw this statement at the presentation, too.

16:19 <HackerFoo> bmalbusca: Have you looked through the issues on GitHub? https://github.com/issues?q=is%3Aopen+is%3Aissue+user%3ASymbiFlow+archived%3Afalse+label%3A%22good+first+issue%22

18:12 <andrewb1999> I'm looking for anyone who would be interested in using/testing my the separate fpga compilation flow I have been working on. Essentially the large device can be partitioned into separate regions that are connected with an overlay architecture, all of which are mapped separately and then merged together. This would allow freely swapping verilog modules in the bitstream and should soon allow for live partial reconfiguration.

18:14 <andrewb1999> I'm working on getting the rest of the code merged soon, and will have intial documentation together next week. Let me know if you would be interested.

18:19 <andrewb1999> And if anyone from BYU is in here, I think this work could be interesting with Maverick as it would allow for the overlay to be generated completely by SymbiFlow instead of Vivado.

19:02 <HackerFoo> andrewb1999: I'd be interested in porting this, which is for partial reconfiguration of a module connected via AXI to a DMA controller which is connected to PCIe: https://github.com/HackerFoo/nitefury-popr

19:02 <tpb> Title: GitHub - HackerFoo/nitefury-popr (at github.com)

19:04 <HackerFoo> It's pretty simple, it's so that I can try code on an FPGA card safely without rebooting the host.

19:11 <andrewb1999> HackerFoo: Yes I think that would be a good use case. Only problem is the lack of PCIe support in symbiflow now. I believe it should still be possible to generate the pcie overlay in vivado and have it line up with a symbiflow partition region so I will add some thoughts to the documentation about how I think that would work.

19:12 <HackerFoo> Thanks