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<sf-slack>
<timo.callahan> @mholenko I found the PR for I2S : https://github.com/enjoy-digital/litex/pull/516 -- I saw the reference to "SoundSoC" which I'd guess is a LiteX target, which was taken out of the branch before merging. Did that end up on some other branch or commit that is accessible? Thanks!
<tpb>
Title: Add I2S support to Arty by mateusz-holenko · Pull Request #516 · enjoy-digital/litex · GitHub (at github.com)
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<_whitenotifier-b>
[fpga-tool-perf] acomodi opened issue #214: Update all VPR tests to use XDC placement constraints - https://git.io/JJyKs
<_whitenotifier-b>
[fpga-tool-perf] acomodi opened issue #215: Transition to use an automated circuit/toolhain matrix generation - https://git.io/JJyKW
<sf-slack>
<cwl11> Hi, I just have a question about the bitstream. When logic tile LUTs get configured, does the largest possible input get shifted to the MSB of the INIT value?
<_whitenotifier-b>
[fpga-tool-perf] acomodi opened issue #216: Add more metrics to the meta.json results files - https://git.io/JJyK0
<_whitenotifier-b>
[prjuray] mithro opened issue #26: Add / document support for the ZCU10[45] dev boards - https://git.io/JJyir
<_whitenotifier-b>
[prjuray] mithro opened issue #27: Add and document support for KCU105 - https://git.io/JJyi1