04:28 <radarchirp> hi

04:28 <radarchirp> hello

04:28 <radarchirp> anyone here use a virtex?

04:45 <radarchirp> yo

04:45 <radarchirp> ping

04:45 <radarchirp> ping pong pang

04:45 <radarchirp> bit error

05:12 <_whitenotifier-3> [fpga-tool-perf] Ruinland opened issue #230: Revise README.md to use - https://git.io/JUTfP

20:35 <andrewb1999> litghost: Is there some (known) limitation on what nodes crossing an ROI can be used for synth tiles?

20:36 <litghost> andrewb1999: Not that I know of? What issue did you encounter?

20:38 <andrewb1999> litghost: I probably will have to post an issue with more details, but I'm running into several cases with the overlay generation where the chosen wire and node seems reasonable but routing just doesn't work.

20:38 <andrewb1999> litghost: Some of the synth IOs work fine and others are unroutable

20:39 <andrewb1999> Looking at the xml rr_graph they appear to be connected

20:39 <litghost> andrewb1999: Ya, create an issue

20:40 <litghost> andrewb1999: So something that you should be aware of has to do with constants directly to synth IO's do not work

20:40 <litghost> andrewb1999: Is that the issue you are having?

20:41 <andrewb1999> litghost: No, this is just routing a switch input into an roi

20:42 <litghost> andrewb1999: I think creating an issue is a good next step

20:42 <andrewb1999> litghost: Yep, working on it now

21:18 <_whitenotifier-3> [symbiflow-arch-defs] andrewb1999 opened issue #1650: Some synthetic IOs unroutable in overlay architecture - https://git.io/JUkzE