cemerick_ has quit [Quit: Leaving]
Kitlith has quit [Ping timeout: 276 seconds]
Kitlith has joined #yosys
promach_ has joined #yosys
<
promach_>
just for info, line 277 had passed BMC
rqou has quit [Remote host closed the connection]
leviathan has joined #yosys
rqou has joined #yosys
<
tpb>
Title: UART/test_UART.v at development · promach/UART · GitHub (at github.com)
dxld has quit [Quit: Bye]
dxld has joined #yosys
promach_ has quit [Quit: WeeChat 2.1]
seldridge has joined #yosys
emeb_mac has quit [Quit: Leaving.]
_whitelogger has joined #yosys
Guest23074 is now known as jayaura
seldridge has quit [Ping timeout: 256 seconds]
promach has quit [Quit: WeeChat 2.1-dev]
dys has joined #yosys
promach has joined #yosys
proteus-guy has quit [Read error: Connection reset by peer]
mjoldfield has joined #yosys
proteus-guy has joined #yosys
dys has quit [Ping timeout: 265 seconds]
_whitelogger has joined #yosys
jwhitmore has joined #yosys
dys has joined #yosys
clifford has quit [Read error: Connection reset by peer]
quigonjinn has joined #yosys
promach_ has joined #yosys
<
ZipCPU>
promach_: You are going to find it difficult for someone to comment on your code based upon just a couple lines.
<
ZipCPU>
Your logic spreads across many files, the trace doesn't make much sense without a thorough understanding of how your logic works.
<
ZipCPU>
Worse, those couple of lines you are struggling with are long lines that are difficult to read and follow.
quigonjinn has quit [Ping timeout: 268 seconds]
AlexDani` has joined #yosys
AlexDaniel has quit [Ping timeout: 260 seconds]
mjoldfield has quit []
mjoldfield has joined #yosys
<
promach_>
ZipCPU: you are right, but not with line 277
<
promach_>
shift_reg should follow assertion at line 277 in induction
mjoldfield has quit []
mjoldfield has joined #yosys
emeb_mac has joined #yosys
m_t has joined #yosys
seldridge has joined #yosys
m_t has quit [Quit: Leaving]
leviathan has quit [Read error: Connection reset by peer]
promach_ has quit [Quit: WeeChat 2.1]
leviathan has joined #yosys
seldridge has quit [Ping timeout: 265 seconds]
seldridge has joined #yosys
<
ZipCPU>
promach: The number of bits on the right hand side of that equation should match the number of bits on the left.
AlexDani` is now known as AlexDaniel
m_t has joined #yosys
proteusguy has joined #yosys
seldridge has quit [Ping timeout: 255 seconds]
ralu has quit [Ping timeout: 256 seconds]
ralu has joined #yosys
ralu has quit [Ping timeout: 256 seconds]
ralu has joined #yosys
sklv has quit [Remote host closed the connection]
sklv has joined #yosys
emeb has joined #yosys
seldridge has joined #yosys
m_t has quit [Quit: Leaving]
kensan has joined #yosys
dys has quit [Ping timeout: 240 seconds]
seldridge has quit [Ping timeout: 256 seconds]
jwhitmore has quit [Remote host closed the connection]
danieljabailey has joined #yosys
tpb has quit [Remote host closed the connection]
tpb has joined #yosys