clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<maikmerten> hi there. If an I/O pin is not constrained via .pcf file, what is is configured to? Is it configured, e.g., in z-tristate?
<whitequark> in what pnr package?
<whitequark> nextpnr?
<maikmerten> nextpnr, yes
<whitequark> it's an error unless you pass --pcf-allow-unconstrained
<whitequark> if you do, it's assigned to a random pin.
<maikmerten> well, all I/Os of the design file are constrained. However, I'm using a Pmod-module that I only need a subset of signals of
<maikmerten> but the other signals are still physically connected
<whitequark> oh I see
<maikmerten> and I want to ensure device and FPGA are not pulling in opposite directions
<whitequark> it's neither in .pcf nor in your HDL
<maikmerten> yup
<whitequark> i think on ice40 the default is a weak pullup
<maikmerten> ah, that'd be safe
<maikmerten> would also explain why the board LEDs are dimly lit while programming
<whitequark> yep.
<maikmerten> cool, thanks!
<tnt> "weak" being a relative term :p
<daveshah> Lattice say 100k nominal (at least for up5k), although iirc an attempt to measure the current suggested closer to 20k
<maikmerten> hmmm... 100k... 20k... "close enough" ;-)
<tnt> Yeah, spec says min 11uA and Max 128 uA
<tnt> and I've seen it be closer to 128 than 11 :p
<whitequark> oh 128 ua
<whitequark> that eplains why the glasgow leds shine so bright after startup
<daveshah> Incidentally, up5k IO pins also support 3.3k, 6.8k or 10k nominal
<maikmerten> can the internal pullups "deliver" that continously or is there a reasonable chance of damage when hard-pulling those to GND?
<daveshah> All of these were pretty accurate, within 10% when I measured
<daveshah> They will be fine hard pulled to ground
<tnt> daveshah: really ? I thought that was u4k only and the up5k didn't have that.
<tnt> In icecube I think that option is not there for the up5k.
<maikmerten> daveshah, thanks!
<daveshah> tnt: it is
<daveshah> I think the datasheet omits it
<daveshah> u4k doesn't support it. The only documented support is for ultralite
<daveshah> But icecube (and nextpnr) both support it for up5k and it works
<tnt> oh yeah, sorry, got confused.
<tnt> how do you configure it ?
<daveshah> `-pullup yes -pullup-resistor 3P3K` in the pcf for example
<tnt> maikmerten: something that got me though is that if you have an IO that's constrained, and in the port list of your top module but that you don't assign to anything, it gets mapped to a hard 0 rather than Z.
<daveshah> Or the PULLUP_RESISTOR attribute
<tnt> good to know.
<maikmerten> tnt, good to know indeed
<daveshah> Oops I mean `-pullup_resistor` in the pcf too
<daveshah> It's a good hack if you accidentally put a too low LED resistor on a board
<daveshah> Just use a 6.8K or 10K built in pullup and switch between 0 or Z
<daveshah> and enjoy nice dim LEDs
<maikmerten> (I have a Cyclone-II dev board with a button that pulls an I/O hard to GND that I use for reset. Pin configured to weak pullup. Fun was had observing the board reset when getting off the chair.)
<tnt> daveshah: or save a resistor all together :p
<tnt> maikmerten: that's a bit weak :p
<maikmerten> yeah :-)
<maikmerten> nothing multi-sampling the input wouldn't solve, though ;-)
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