clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<hackerfoo> There's some public information on the Pixel Visual Core, which is CGRA-like. There's even a section in Patterson & Hennessy's latest "Computer Architecture: A Quantitative Approach"
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<hackerfoo> Also, the routing can be dynamic in CGRAs, while it is generally static in an FPGA.
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<mrec> hm does anyone know is there a linux console tool available for uploading a bitstream generated by radiant?
<ZirconiumX> mrec: for which chip?
<daveshah> Radiant only supports up5k
<daveshah> mrec: I guess you want iceprog (part of icestorm)
<daveshah> Assuming this is a FT[2]232H based programmer, like the ones on the Lattice dev kits
<mrec> ah cool that's probably what I want/need
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<mrec> daveshah: do you know is there any schematic out there how to wire up the FTDI 2232 with an ice50up so it will work with iceprog?
<tnt> mrec: check the icebreaker schematics.
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<mrec> tnt: that's nice thanks, do you know if I wire it up like that will that also work with the windows firmware tools? (I'm just curious)
<tnt> I have no idea what you mean by "windows firmware tools" ...
<mrec> the original lattice programming tool
<tnt> yes
<mrec> sorry it's not a firmware of course
<mrec> nice that's easy, I'll wait until tomorrow one debugging pad went loose on my prototype and need to wait until the glue is dry.
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