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fseidel>
mithro: huh neat, I'll take a look at that repo kc8apf posted
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sxpert>
daveshah: what would Warning: Wire saturn_core.clk_phases has an unprocessed 'init' attribute.
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daveshah>
sxpert: it means it has ignored and initial value
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daveshah>
If it matters, this PR probably fixes it
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sxpert>
so I need to set it up with actual clocked logic
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daveshah>
Ah, is it not a reg?
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sxpert>
it is a reg
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daveshah>
But driven from a clocked always or always@(*)
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sxpert>
clocked always
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daveshah>
Right, that's known bug in Yosys ecp5 that the above PR fixes
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sxpert>
I need it to start with a 4'b0001 value anyways, as I understand, ECP5 can't do that
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daveshah>
However, init value has to be the same as set/reset value
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daveshah>
That PR will convert sync set/reset back to logic if they conflict
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sxpert>
or I can ignore the initial stuff and do it in logic
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sxpert>
which will work everytime
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sxpert>
ah, the initial value must be the same as the reset value... gotcha
<
sxpert>
trying that
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sxpert>
daveshah: wow, factorizing the "PC + 1" into a wire saved like 300 luts !
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_whitenotifier-9>
[whitequark/Glasgow] whitequark 02219d8 - applet.yamaha_opl: new applet.
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