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<pepijndevos>
whitequark, cdc ping
<whitequark>
pepijndevos: pong
<pepijndevos>
I'm looking at my big pile of gowin manuals, but I'm honestly not exactly sure what I'm even looking for
<whitequark>
something like "async ff" perhaps?
<whitequark>
and "false path"
<whitequark>
do they have any examples involving CDC?
<pepijndevos>
when you say CDC primitives... do you mean the syntax of the file that specifies the clock domains?
<whitequark>
no
<pepijndevos>
or some actual hardware primitive
<whitequark>
so, when you make a 2FF synchronizer, you can do it purely in portable Verilog
<whitequark>
but if the toolchain doesn't know it's for CDC, it might decide to cleverly optimize it
<whitequark>
if the P&R doesn't know it's for CDC, it might place the FFs so far apart the synchronizer stops working
<whitequark>
if the timing analyzer doesn't know it's for CDC, it might try to ensure the path through it matches setup/hold requirements (between two async clocks)
<whitequark>
there is usually some sort of attribute preventing that
<pepijndevos>
I see...
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<pepijndevos>
It's definitely not mentioned in their hardware primitive guide
<whitequark>
ok, so it probably just doesn't have any attributes like that
<whitequark>
I mean, neither does Yosys, really
<whitequark>
hm, can someone send me a gowin devboard? then I can implement and test nmigen support more easily
<whitequark>
though really if anyone else would go through one of the existing platforms and do the same things for gowin it'd work too
<pepijndevos>
whitequark, they use synopsys for synthesis, so surely that has a well-known attribute for it
<whitequark>
it's not just for synthesis
<whitequark>
and even with synopsys frontends there are some differences anyway
<whitequark>
it's possible to use syn_keep (which is a bigger hammer than necessary but works), but it doesn't fix e.g. the timing analyzer getting confused (in case that's a problem)
<pepijndevos>
whitequark, maybe ping edmund, he got a box of 100 Tang Nanos, of which I handed out a dozen to interested people. I also have a few left I could ship to you if needed.
<pepijndevos>
(or anyone who wants to contribute to Apicula really)
<whitequark>
pinged
<pepijndevos>
Yea, if Synopsys does not really have a way, I don't think Gowin has a way to thread these attributes through synthesis and implement them in PnR
<whitequark>
it's not the responsibility of synplify
<whitequark>
hm, anything in their constraint files?
<whitequark>
also, it might be worth looking in their IP generator
<whitequark>
in case they use some attributes they didn't document but which are clearly intended for public use
<pepijndevos>
Or strings | grep their binary for some well-known attribute and see what pops up in the vicinity
<whitequark>
they really are vendor-specific
<pepijndevos>
:/
<whitequark>
intel, lattice, and xilinx have three different ones
<whitequark>
vivado also adds some advanced capabilities to the mix i've seen no other vendor match yet
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