hno changed the topic of #linux-sunxi to: /Allwinner/sunxi development discussion - Don't ask to ask. Just ask and wait! - See | | Logs at
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<arokux> Turl, good night
<Turl> night arokux
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<oliv3r> goooood morning ya'll
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<oliv3r> arokux1: we have the ccm documented on the wiki too; and there there's quite some typo's fixed (and naturally introduced)
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<mnemoc> uh
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<oliv3r> hehe
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<oliv3r> _hipboi_: tom, i see in the shematic you have not connected pin 14 of the HDMI connector, so cubieboard isn't 1.4 compatible is it?
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<_hipboi_> oliv3r, i just checke the HDMI specification pin 14 is reserved
<oliv3r> pin 14 is HEC (HDMI Ethernet CHannel)
<oliv3r> pin 19 is HEC + HDMI hotplug Detect
<oliv3r> (HEC has + and - like thernet, but only 1 pair for probably half-duplex operaton)
<oliv3r> I belive hdmi 1.4 added HEC to the standard
<oliv3r> or was it even 1.3?
<_hipboi_> oliv3r, i just find the spec of hdmi 1.3 online, pin 14 is reserved
<oliv3r> yeah that it was 1.4 that added HEC
<oliv3r> pin 14 and 19 supply the differential signal of HEC
<oliv3r> while not super interesting I think, in theory, the idea is, that oyu plug your cubie to ethernet, and use HEC to supply internet to your smart tv
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<oliv3r> i'm not entirly sure, if the 1.4 spec Requires HEC or if it's optional for .14
<oliv3r> the other way around is a little more interesting, say oyu have a smartTV with wifi/ethernet connected, and you want to use the cubie as an additional device, you only need to connect HDMI (with CEC and HEC) and have a 1 cable (+power) solution ;)
<oliv3r> i'm not sure if a10 even supports hec btw
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<hno> oliv3r, A10 do not support HEC. And it's entirely optional in HDMI 1.4.
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<hno> arokux1, emac tftp booting is supported in sunxi u-boot since way back.
<hno> but you need to set the mac address (setenv ethaddr xx:yy:...), and enable phy power on boards requiring it (gpio set Pxxx).
<oliv3r> hno: it's optional? i thought 1.4 or 1.4+ it was mandatory
<hno> oliv3r, as far as I know it's optional and advertised separately. Even on cables.
<oliv3r> hmm, makes sense it's advertised on cables, since if pin14 is missing, your screwed ;p
<oliv3r> but i though tthat was the whole point of the 1.4 or 1.4+ certification thing
<oliv3r> bummer, would have been a neat feature ;)
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<hno> oliv3r, it also do not require every equipment to handle 4Kx2K, 3D, increased colour depth, audio return, have all of the available connectors, or many other optional features.
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<arokux> hi, guys
<arokux> = one .git, multiple working directories.
<hno> arokux, not really needed. git automatically optimizes storage when you clone a local repository.
<arokux> hno, it is not about it. it is if you want to work on two branches simultaneously
<hno> arokux, yes?
<hno> I don't get the difference.
<arokux> hno, ok. you have linux tree with branches mainline and sunxi-3.4. you want to work on mainline, so you check it out. but you also want to look at sunxi-3.4 -- so you need this one to check out too.
<hno> arokux, so you clone anc check out.
<arokux> hno, you mean you clone again?
<arokux> hno, and end up with two linux trees?
<hno> from your local copy.
<hno> yes
<hno> without wasting another GB in .git storage.
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<arokux> hno, wait, how can it be without wasting?
<arokux> hno, if you clone it, it will duplicate .git, or?
<arokux> hno, so instead of doing that you just use this script, it sets up a bunch of symlinks to you .git and checks out in new working directory.
<hno> there is two modes. The standard secure mode hardlinks .git. Another mode is using --reference to make git look in both .git folders.
<hno> arete74, with the symlinks you can easily destroy the other tree by accident.
<hno> even --refrence isn't entirely safe, but chances are much lower.
<hno> sorry arete74, meant arokux above.
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<arokux> hno, hm.. ok, need to read about those options more. :)
<arokux> hno, strange they were not in the answer to those questions.
<hno> arokux, I find it strange the question was even asked. As I said git does this automatically.
<hno> even the method used by --reference is done automatically when hardlinking is not possible.
<arokux> hno, well, not everybody knows it :)
<hno> $ du -sk kernel/.git kernel-clone/.git
<hno> 1320940kernel/.git
<hno> 4512kernel-clone/.git
<hno> after a plain clone.
<arokux> du -sh linux/ sunxi-3.4/
<arokux> 1.7Glinux/
<arokux> 679Msunxi-3.4/
<arokux> hno, --^
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<arokux> du -sh linux/.git sunxi-3.4/.git
<arokux> 922Mlinux/.git
<arokux> 4.2Msunxi-3.4/.git
<arokux> hno, and .gits --^
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<hno> sorry, mixed up the options a little bit, it's --shared for the "symlinked" mode when cloning a local repo. --reference is much the same but used differently (git clone --reference somelocalrepo someremoterepo)
<hno> that brings down the kernel .git to 136K.
<hno> + whatever you needed downloading from the remote repo in the --reference case.
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<oliv3r> so git clone --refrence /projects/kernel /projects/kernel_clone is the most efficient way
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<oliv3r> mripard_: ping
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<mripard_> oliv3r: pong
<hno> oliv3r, git clone --shared /projects/kernel /projects/kernel_clone
<hno> oliv3r, git clone --reference /projects/kernel -b stage/sunxi-3.4
<hno> to give some ideas..
<hno> but read git clone manual so you know what you must not do in /projects/kernel when using this.
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<adrian> hi
<adrian> i am going to compile kernel for olinuxino a20, i need some advice please
<oliv3r> mripard_: i'm trying to work in the .data from compatible, and it's working quite well, except for that when I want to create a sysfs binary attribute, we have the .read and the .size field
<oliv3r> the .size needs to be filled from the .data; which at that point doesn't 'exists' i suppose?
<oliv3r> adrian: are you compiling 3.3?
<adrian> i am trying 3.4
<oliv3r> from what repo/branch?
<mripard_> oliv3r: show me the code
<oliv3r> its' very messy and wip; but sure
<oliv3r> mripard_:
<mripard_> oliv3r: hmm, you won't use like that I supposeL
<mripard_> you'll call device_add_groups during probe right?
<oliv3r> until greg fixes sysfs, yeah
<oliv3r> so i can still edit the field before calling sysfs_create_groups
<oliv3r> but one sysfs gets fixed for bin attrs, that won't be possible as the .groups creates it before probe
<mripard_> then you can just "patch" the size atribute just before registering it
<oliv3r> yeah; and let greg worry about it otherwise? :)
<mripard_> well, yeah
<oliv3r> he did say just submit and i'll fix it later
<oliv3r> ok
<mripard_> we have no idea about what he'll come up with
<oliv3r> i did think of that, but didn't wanna do that as it looked 'nasty'
<oliv3r> lol
<oliv3r> magic voodoo
<mripard_> yeah, maybe it will just work that way, we don't know :)
<mripard_> and you can also drop the intermediate variable
<mripard_> just store the 512/64 stuff directly into data
<oliv3r> one quicky silly question, what's wrong with l142? i see you do the same thing (using a memcpy for a whole struct)
<oliv3r> mripard_: okay
<mripard_> 142?
<mripard_> which fileL
<mripard_> ?
<oliv3r> sid_data->keysize = &pdev->dev->data;
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<mripard_> I'm not doing that :)
<mripard_> look at the device affectation :)
<oliv3r> ohhh
<oliv3r> yeah i see it now
<oliv3r> *dev vs device
<oliv3r> tss tss
<oliv3r> :
<oliv3r> device = of_match_device(mv64xxx_i2c_of_match_table, dev);
<oliv3r> that's how you get it, ok now it makes more sense
<mripard_> yep
<oliv3r> sorry for the noise :)
<mripard_> that's ok, it's not noise at all :)
<oliv3r> :)
<arokux1> hno, and emac worked for you on mele a1000 without problems?
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<oliv3r> mripard_: is the caches bit SMP issue something that shoudl be solved in u-boot?
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<hno> arokux1, yes after enabling the PHY power. Without setting the gpio bit the PHY power is not reliable.
<mripard_> oliv3r: yep. I haven't took the time to get all hno asked me, particularly to extract the BROM
<hno> tested some weeks ago on mele.
<mripard_> oliv3r: and I'm not convinced by their argumentation either
<hno> mripard_, extracting the brom is easy... just put it in fel mode and use fel command to read the brom region.
<mripard_> so I've not given up on putting it into the kernel
<oliv3r> mripard_: i think we have the brom extracted, but once i've finished the sid driver and sent it to the ML i'll poke it with a stick
<mripard_> hno: yeah, I just didn't have much time to play with the boards lately, that's all
<oliv3r> don't we have an A20 brom?
<oliv3r> i thought luke supplied us the brom from the eoma68-a20
<hno> oliv3r, A20 is in my Allwinner-Info repo..
<mripard_> oliv3r: it's the A31 one that I was refering too
<mripard_> but yes, for that aspect both behaves the same way
<hno> what is the question for BROM?
<hno> SID interaction?
<mripard_> no, it's not really a question actually. It's just that I mentionned the SMP bit in my A20 patches, and oliv3r was asking about wether it should be fixed in u-boot or not
<hno> Ok.
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<mripard_> and the last time we spoke about this, you actually told me to extract the BROM of the A31
<mripard_> which I didn't do yet
<hno> iirc A20 boot0 (or was it boot1) sets it.
<oliv3r> mripard_: well i'll try to look into the a20 since i don't have a31 to test with
<hno> but memory a little dim.
<hno> a20 is easy test. Just boot u-boot from SD and look if the bit is set?
<oliv3r> from my weak memory, I think we found that it wasn't set at all in the bootloader
<oliv3r> do we know the address? i'm looking at u-boot right now anyway
<oliv3r> if it's setable this way, i saw on the ML that it was set using ASM
<hno> oliv3r, its a cp15 bit.
<oliv3r> that, can we look at that from u-boot?
<oliv3r> didn't think the arm registers where mapped to memoryspace
<oliv3r> (if I say stupid stuff it's because I don't know any better ;)
<hno> oliv3r, right.. a little code is needed probably.
<hno> mripard_, do you remember which register & bit it is?
<mripard_> it's ACTLR, Bit 6
<hno> which cp15 reg number is that?
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<oliv3r> SMP bit?
<hno> oliv3r, yes it's there.
<hno> mw.l 10000 0xee110f30
<hno> mw.l 10004 0xe58f0000
<hno> mw.l 10008 0xe12fff1e
<hno> go 10000
<hno> md.l 1000c
<hno> should work I think.
<oliv3r> so we can read the CPU registesr via regspace? i thought that would be like sram or something
<hno> Err.. that's not right. One moment.
<oliv3r> oh mw
<oliv3r> nvm :)
<hno> or.. .it is. Never get used to delayed PC displacements.
<oliv3r> i can't read asm lik ehat ;)
<hno> more readable.
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<hno> What I meant is
<hno> 4:e58f0000 strr0, [pc]; c <.out>
<hno> instruction is at 4, references [pc] which is already two instructions later, C
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<oliv3r> ah that's a lot more readable yeah
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<wingrime> oliv3r: carp, I still have no idea why no one kernel IR protocol decoder can't decode anyting I send to it
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<arete74> utt
<oliv3r> wingrime: :(
<oliv3r> wingrime: i keep getting null pointers and don't know why :)
<wingrime> oliv3r: ir driver small 300 lies
<hno> crap, what is it with DNS today? Servers down everywhere I look.. both resolvers and authorative servers.
<oliv3r> wingrime: how come? shutko's driver was like 3000 lines
<oliv3r> which ones?
<oliv3r> seems fine here
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<oliv3r> great, printk now not even working
<hno> oliv3r, dig +trace
<oliv3r> that's actually down
<oliv3r> :p
<oliv3r> same issue here anyhow
<oliv3r> mripard_: is there any reason why a randomly placed printk refuses to output anything?
<hno> ok, both and apparently have the same DNS provider,
<oliv3r> so bluehost might be having issues
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<hno> Looks so. And hopefully the outage at my hosting provider is jus ta coincidence.
<oliv3r> also down
<oliv3r> maybe they are overheating!
<mripard_> oliv3r: it's never executed? :)
<oliv3r> oh
<oliv3r> of course
<oliv3r> sysfs_create_group() wants you to check the return value, with device_create_bin_file I never had to
<oliv3r> so maybe i'm checking for the wrong return value
<oliv3r> though if!device_create_bin_file() return; sounds sane
<hno> oliv3r, there is two IP addresses which looks like different networks, but maybe it's all one and the same after all.. it's depressing how little major players care about protecting their DNS from major outages.
<oliv3r> hno: what do you mean, reduancy and downtime prefention, I dont pay you to think!
<oliv3r> mripard_: i would have expected an error from probe if it gets a reutrn -ENODEV however
<wingrime> oliv3r: IR
<oliv3r> wingrime: shutko has a 3.4 'ir framework compatible' driver on the ML, turl linked it yesterday
<hno> With result:damn all our customers suddently dropped off the net completely. damn, not even our emergency web server works to keep contact with our customers, damn, cant even send email via google. All because DNS is down.
<oliv3r> ouch
<oliv3r> don't you have your own caching DNS server?
<hno> well, not mine but bluehost...
<oliv3r> :S
<oliv3r> that totally sucks
<hno> yes, happened to one of the largests DNS providers here in Sweden not that long ago.
<wingrime> oliv3r: there two kinds on IR driver
<wingrime> oliv3r: 1) RAW RC
<hno> but some things are a little hard to protect from.. like how .se managed to screw up the whole zone some year ago due to a misplaced ., and thanks to long TTL it took quite some time to sort out.
<wingrime> 2) keycodes only
<hno> wingrime, and then there is RAW RC -> keycodes..
<oliv3r> hno *shiver*
<oliv3r> wingrime: TubmMsJdJe0J
<oliv3r> grr
<hno> oliv3r, was wondering for a while what that meant :)
<oliv3r> :D
<oliv3r> not my password
<oliv3r> :p
<hno> That's a new idea.. use google mail id's as password generator.
<oliv3r> i tend to use for that
<oliv3r> each website that wants a password gets a unique password
<oliv3r> though I do result to firefox to remember them all for me
<oliv3r> i started doing that when i noticed passwords where being sent back to me by mail; 'thank you for registering with our service, your password is ....'
<oliv3r> that made me just go 'wtf'
<oliv3r> so each site, gets their own passwd now
<wingrime> oliv3r: crap, I doing same stuff
<oliv3r> wingrime: shutko's driver is 3.4 only though
<oliv3r> so don't worry
<oliv3r> and his driver is only 350 lines too :)
<oliv3r> so your doing it very right i suppose
<oliv3r> mripard_: why, why do these stupid pointers not match :(
<mripard_> oliv3r: which pointers?
<oliv3r> because i'm an idiot!
<oliv3r> when putting the data in, i printed sid_data; but on retrieval i printed &sid_data
<mripard_> that's a valid reason :)
<oliv3r> so of course not
<oliv3r> yeah :)
<oliv3r> what i did initially was, if (!device_create_bin_file) return;
<oliv3r> but i never got an error code
<oliv3r> and that might be the reason why things didn't work beyond that, the node got created, but the rest of the driver got destroyed
<oliv3r> so removing the ! shoudl fix it now
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<oliv3r> but i don't get why i don't get an error message or anything
<oliv3r> i mean, the driver framework checks the probe's return value doensn't it?
<Turl> mripard_: hm, forgot to title your cover letter :)
<oliv3r> or does it silently abort/dstroy stuff
<mripard_> yeah, it should
<mripard_> Turl: yeah, I know....
<mripard_> Turl: it's for the same reason that the one oliv3r just mentionned
<wingrime> oliv3r: are you tested new driver
<mripard_> it's "because i'm an idiot!" :)
<Turl> heh
<oliv3r> wingrime: nope, haven't tested any IR driver yet; it's not new, it was on the ML in march i think? (I just forgot about it)
<oliv3r> wingrime: but I did submit a ir unification driver :)
<oliv3r> mripard_: *high five*
<oliv3r> mripard_: well my probe returned -ENODEV; but silently continued as if nothing was wrong
<oliv3r> except it crashed horribly when trying to use it
<oliv3r> mripard_: thank you! it works, sid for a10 + a20 :)
<oliv3r> just have to test it on a20 ;)
<mripard_> great :)
<wingrime> oliv3r: you can pocke shutko, hi remove AW original driver name
<oliv3r> wingrime: that driver never got merged
<wingrime> Daniel Wang
<wingrime> oliv3r: at and
<oliv3r> i think he wanted to make a new driver, sunxi-cir.c to coexist with sunxi-ir.c
<wingrime> oliv3r: bad idea
<wingrime> oliv3r: also he use spinlock in irq context
<oliv3r> wingrime: it's not merged because it wasn't great i think
<oliv3r> wingrime: i told him yeterday, that we'll wait for your mainline driver, and then backport it to 3.4
<wingrime> oliv3r: he tested it
<wingrime> ?
<Turl> mripard_: sorry, I completely forgot about the A10S series the other day
<mripard_> Turl: that's fine, I just wanted it not to be forgotten
<Turl> mripard_: is a reviewed-by ok?
<Turl> mripard_: I just have that small comment about usbotg vs usb0, but it's not a big deal
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<oliv3r> mripard_: if i want to reserve memory for an array of ints, very simple, but dont' know the size after running some function, do I still use devm_kzalloc() for such a simple thing? The var gets free'd in the same function
<mripard_> Turl: yep, and a Tested-By would be great as well ;)
<oliv3r> wingrime: of course :p it should work (tm)
<woprr> lo
<mripard_> oliv3r: kzalloc then
<oliv3r> mripard_: the other option is of course kmalloc() but there's 3 (slub, slob, slab)
<oliv3r> ah ok
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<oliv3r> that's always from slab ;)
<woprr> incoming Olimex UK Royal AIRmail :)
<oliv3r> grats!
<wingrime> Turl: whan IR clock get in mainline for a10/a20
<woprr> report 5 days delivery time
<wingrime> *when
<oliv3r> wingrime: when you as khim nicely to add it ;)
<wingrime> oliv3r: mail to larml ?
<oliv3r> wingrime: turl is right here ;)
<oliv3r> Turl: ^
<Turl> wingrime: hopefully 3.12-rcN
<oliv3r> Turl: do you have IR clock in your repository? maybe wingrime can cherry pick it
<Turl> oliv3r: he's working in sun7i, that complicates things a bit :)
<oliv3r> Turl: sun4i AND sun7i :p
<oliv3r> but yeah :)
<oliv3r> wingrime: i feel your pain :p
<oliv3r> i want to code against linus's tree, but dependant on a lot of unreleased work
<wingrime> oliv3r: we can easy support each-other in larm by Teseted-by and ...
<wingrime> Reviwed-by:
<oliv3r> wingrime: oh absolutly
<oliv3r> but i need to setup a testing enviroment :p
<oliv3r> via tftp
<oliv3r> but my phy is broken on a10
<oliv3r> and a20 i don't have a kernel that builds yet
<wingrime> oliv3r: also, x-modem
<oliv3r> wingrime: but yes, i tend to sen dmy patches to linux-sunxi only first; so we can test it :)
<oliv3r> wingrime: yeah i suppose x-modem is a good way too
<oliv3r> but with tftp, i should be able to do things faster
<oliv3r> wingrime: 1 sd card that's setup to boot from tftp
<oliv3r> reboot; done
<woprr> to DE, securely packaged in carton
<oliv3r> with xmodem i still have to do a lot of manual things
<oliv3r> woprr: unpack it allready!
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<wingrime> oliv3r: actualy you can use hno usb-boot and script
<hno> woprr, Bulgaria to DE using UK Royal Airmail?
<woprr> oliv3r, it's SD debian already up and running on JTAG, no USB HID yet
<oliv3r> hno: lol we all wondered the same yesterday
<woprr> hno, no olimex UK (ebay shop)
<oliv3r> Tsvetan: it's tstrange that it's cheaper for people from DE, to order in the UK, rather then getting it directly from Bulgaria :)
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<woprr> 18EUR DHL... I don't trust in bulgaria post
<hno> heh
<oliv3r> it's sad really, if we have to resort to special mail, because normal post is unreliable
<woprr> *duck* had many issues with some east european postal services, sorry
<oliv3r> normal post has been really good last century, before all these special companies existed
<oliv3r> i've orderd tons of stuff from ebay from china/shenzen/hongkong/thailand
<hno> the packages they have sent to me have all made it.. but they have all been sent as private post not using Olimex as sender..
<oliv3r> hno: same
<hno> don't know if that's how they normally do it, or just for these special shipments.
<Tsvetan> oliv3r no way this to be true
<Tsvetan> BTW since a year we do not use Bulgarian post but DHL Global Mail
<Tsvetan> which works this way - DHL takes bag with parcels and send them to Germany, then they are re-distributed by Deutsche Post
<oliv3r> woprr: ^^^
<oliv3r> woprr: see, olimex is save ;)
<oliv3r> Tsvetan: thanks for clearing that up :)
<Tsvetan> and they have same prices as Bulgarian post
<oliv3r> Tsvetan: getting ready for hollidays?
<Tsvetan> yes :)
<oliv3r> tomorrow i have to travel through germany :S
<oliv3r> 'black saturday' i think is the official day of tomorrow here
<oliv3r> germany + france + NL (and probably more) all have hollidays now
<oliv3r> Tsvetan: oh before i forget, what connector did you use for the 'VGA' connector? I tried search for JST mini 6PIN; but it's very hard to find anything that matches, also i think we can also output YUV via that same port (RGB -> YUV)
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<oliv3r> Tsvetan: you don't happen to have a VGA/YUV/COmposite/COmpenent breakout board with that plug do you?
<Tsvetan> we will offer low cost VGA cable for A20
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<oliv3r> Tsvetan: only vga?
<Tsvetan> this is 0.05¨ connector we buy from
<oliv3r> Tsvetan: Because i think you can use the same port (if setup the right way) as Component OR shvs/composite :)
<Tsvetan> probably
<oliv3r> ok 0.05" pitch, i'll try to search some contra plugs fro it
<Tsvetan> hint PIC-ICSP uses same connector :))
<oliv3r> ohhh
<oliv3r> really? (<- avr guy :p)
<oliv3r> Have one to sell? Sell it yourself
<oliv3r> Olimex PIC-ICSP adaptors microchip pickit3 mplab debugger programmer
<oliv3r> :p
<oliv3r> found the header at least
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<hno> oliv3r, you had the connector and didn't recognise it?
<oliv3r> hno: on ebay :p
<oliv3r> i don't think i have that connector
<oliv3r> i need to find some 'connector kit' with all thse standard connectors or something
<hno> there is no standard...
<oliv3r> need to get some 4 pinned connector housings for the USB debug ports too
<oliv3r> well relative defacto standard
<oliv3r> i think these are called JST and mini JST
<hno> Yes, those are quite common.
<oliv3r> Tsvetan: btw, for the next revision, use a 2 pin JST connector for sata power ;) the one you have now looks like a fan header (and doesn't fit my sata + power adapter :p
<oliv3r> actually, i should have a header somewhere so i can re-solder it
<Tsvetan> we will make custom cable do not worry ;)
<oliv3r> :)
<Tsvetan> also we work on small box with 2.5¨ 320GB SATA drive + A20 + Gigabit ethernet + WiFi
<Tsvetan> with UPS backup LiPO battery in the box
<Tsvetan> which allow work for hours if power is down
<oliv3r> oh nice, do you know if you can run it with 2GB ram yet? Or still same story as with A10 '1g ram max'
<Tsvetan> no plans for 2GB RAM
<oliv3r> Tsvetan: from what i saw, the gigabit PHY is connected the same way as the ethernet PHY, pintout is identical, driver wise it's a whole different story. Current driver will do 10/100mbit as before (with the gbit PHY is if support MII)
<Tsvetan> would make nice home NAS/media server
<Tsvetan> its matter of software
<oliv3r> yes absolutly
<Tsvetan> if the hardware supports it soon or later the driver will be made
<oliv3r> just saying, for A20, we have no driver for gbit yet
<oliv3r> yeah i found a similar driver in sun6i dump, so gonna work on porting that when time permits
<Tsvetan> maybe this will be also base for home automation server
<oliv3r> it should be emac compatible, which means 100mbit parts will work 'better'
<Tsvetan> with proper wired/wireless interface for Zigbee sensors etc
<oliv3r> yeah, that was my plan for ages
<oliv3r> take a10/a20 soc, with some tablet interface, and hook it up where you have the thermostat normally
<Tsvetan> so you can log temperature, open/close doors with RFID tags etc
<oliv3r> Tsvetan: oh! for your 'sensors' section, an I2C or SPI based 'opentherm' board ;)
<Tsvetan> watch camera stream who is at home etc
<oliv3r> OpenTherm should be what most heating/cooling systems speak (and the board should be backwards compatible with the ancient relais system)
<oliv3r> then you can control your thermostat :)
<Tsvetan> yes with GSM interface
<oliv3r> i've only researched opentherm very minimally, it's an open standard
<oliv3r> but there's several ways the pins have to be able to work
<Tsvetan> once the server is avaialble there are many things which could be done
<oliv3r> some kettles are wired as a 250V relais :p
<oliv3r> oh yeah!
<Tsvetan> I do wonder is A20 can make boot mix from NAND/SATA
<oliv3r> Tsvetan: once we can boot via mtd from nand, you can load your OS from sata
<oliv3r> you can do (e)MMC -> sata boot now
<Tsvetan> I mean the kernel to ne in the NAND then the rootfs to be in SATA drive
<oliv3r> load the kernel from (e)MMC, and load initrd from sata + os
<oliv3r> yeah, with mtd should be easy, in theory, you can do that now
<oliv3r> boot0->boot1->u-boot->boot.img(kernel)
<oliv3r> the kernel doesn't care where rootfs, so can be on sata
<oliv3r> i would make a small initramfs, that checks if sata has a valid rootfs, loads that, if not, continues to load from nand
<Tsvetan> I will have some time now at vacation to think about this home automation server
<Tsvetan> but it could combine many things: lighting, security, temperature, electricity monitoring, logging
<Tsvetan> files serving
<oliv3r> yeah
<oliv3r> well there's 2 kinds of users
<oliv3r> those technically inclined that have nothing, no server etc, so for those it can do a bit more
<oliv3r> and the techies, that have it as an 'extra' device in their network :)
<oliv3r> but hardware isn't a huge issue, software atm is
<oliv3r> a few home automation systems, but only little opensource ones that work great
<Tsvetan> this could be made modular
<Tsvetan> different modules which to be loaded
<oliv3r> yeah
<oliv3r> exciting things possible :)
<oliv3r> time to go home :)
<oliv3r> mripard_: i'll try to cleanup and test a20 for sid and mail it today
<Tsvetan> A20 have 4 TVin i.e. 4 cameras can be monitored
<oliv3r> testing will not be possible tomorrow + 7 days
<oliv3r> Tsvetan: oh yeah
<Tsvetan> so this can be also home DVR
<oliv3r> and woprr is working on DVB module (a10/a20 have that too)
<woprr> yeah, if i got usb hid up, the olimex ext4 debian partition and UART0 comms error free ...
<woprr> # ls /lib/modules
<woprr> 3.3.0+\0x093.3.0+.bak
<woprr> root@A20:~# [ 306.402776] EXT4-fs (mmcblk0p2): error count: 53
<woprr> [ 306.407406] EXT4-fs (mmcblk0p2): initial error at 1370529427: ext4_mb_generate_buddy:739
<woprr> [ 306.415518] EXT4-fs (mmcblk0p2): last error at 14: ext4_mb_generate_buddy:739
<woprr> fsck this thing on dev host...
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<wingrime> [ 278.702381] NEC scancode 0x020c
<wingrime> nice
<wingrime> some times works
<wingrime> but repeat not
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<wingrime> mripard_: ping
<wingrime> Turl: ping
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<Turl> wingrime: pong
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<wingrime> Turl: decoding works
<wingrime> Turl: but repeat but somereason not
<wingrime> Turl: [ 339.220757] NEC scancode 0x020c
<Turl> wingrime: I don't know anything about IR
<Turl> but great to hear it works :)
<wingrime> Turl: it when you press key and hold
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<Turl> wingrime: does it send special command 'repeat' or does it send same keycode over and over?
<wingrime> Turl: something around
<wingrime> [ 578.731010] Discarding last key repeat: event after key up
<wingrime> but key not uped
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<Turl> wingrime: "sun4i-ir" does not seem to handle repeat either
<Turl> wingrime: when I press key it tells userspace event "1", no event until I release it
<Turl> then I get event "0"
<Turl> so it handles key up/down but no repeat
<wingrime> Turl: I find problem
<arokux> hi hackers
<Turl> howdy arokux
<wingrime> Turl: It seems I have make IR table for remote I have
<wingrime> Turl: more one patch for sending
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<wingrime> Turl: also, how I can export some custom parameter to dt
<Turl> wingrime: like what?
<wingrime> key map id or name
<wingrime> ir->rc->map_name = RC_MAP_AVERMEDIA_M135A ;
<wingrime> repeat works , but requires valid key code in keymap
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<Turl> wingrime: that should not be in dt I think
<Turl> mripard_: ^
<wingrime> Turl: also , IR can be wakeup source
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<Turl> yep :) that would be nice to have to test pm on cb
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<wingrime> Turl: so, I still need cleanup,test, check-patch ir dirver
<wingrime> but I can't send untill clocks not in mainline
<Turl> wingrime: you can send to linux-sunxi so we can review the rest of it
<Turl> wingrime: add a comment /* HACK */ on the clock code so it is easy to notice :)
<wingrime> Turl: [RFC] ?
<Turl> yeah
<pitillo> hello, does someone know how can I check the amount of memory of a cubieboard? (or which batch came from?)
<Turl> pitillo: look at the ram chips on the board and do the math :)
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<pitillo> Turl: the problem... cubie is some Km far from home. Thank you by the way. I'll try to contact someone to send a pic :)
<Turl> pitillo: the other way is guessing :)
<Turl> pitillo: unless you bought it really early, it's most likely a 1G cubie
<pitillo> Turl: yeah, I've read about batchs, but as it was sent to play with it, I'm not sure which batch came from
<pitillo> probably it's a 1GB model but the script.bin was wrong (melea1000 shows dram_size = 512)
<pitillo> Turl: I'm a bit lost... should I use cubieboard.fex to build script.bin instead of mele_a1000?
<Turl> pitillo: yes, mele is a set top box, not a cubieboard :)
<pitillo> Turl: ufff thank you very much Turl, I was ready to test the new script.bin.
<arokux> Turl, can I use 0.5 for division? probably not...
<wingrime> arokux: fload in kernel not allowed
<wingrime> arokux: but you can use "/"
<wingrime> arokux: but only integer division
<arokux> wingrime, yeah.. I just hoped it is allowed now
<arokux> ok
<wingrime> arokux: FPU context not saved normaly in kernel threads
<pitillo> this should be an older cubie... Once script.bin is rebuilt from cubieboard.fex it still shows 512
<wingrime> pitillo: original fex?
<pitillo> wingrime: built from sunxi-boards/sys_config/a10/cubieboard.fex adding only the MAC address
<wingrime> pitillo: we have cubieboard_512 for 512
<wingrime> pitillo: wait
<wingrime> pitillo: you rebuilded uboot?
<pitillo> yeah, I saw it too... since I can't access directly to the board to check the chips and know really how much amount it has...
<pitillo> wingrime: yes, it's built from u-boot-sunxi too
<pitillo> ummmm
<wingrime> pitillo: you will not able see 1gb untill you reflash uboot and spl with 1gb settings
<pitillo> and it was built using mele_a1000... my bad
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<pitillo> wingrime: it's currently booting from the SD card, all is built following the first steps guide, and probably I missunderstood the mele_a1000 meaning... all is built for it instead of cubie
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<wingrime> pitillo: actualy replacing fex in boot parition not have effect on memory amount
<wingrime> pitillo: you need reflash SPL
<pitillo> wingrime: I think I need to create the right spl... it's created using mele_a1000 but I can't see in boards/allwinner
<wingrime> cubieboard there
<pitillo> should it be boards/sunxi?
<wingrime> make cubieboard
<wingrime> like that
<pitillo> ummmm
<pitillo> let's see
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<Turl> arokux: X/0.5 = X*2
<arokux> Turl, right. but "*" was fixed in my case :)
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<wingrime> arokux: also shifts a= a/2 same as a >>= 1
<arokux> wingrime, :) thanks
<wingrime> Turl: IR can wake , but I can't deal with address and key when sleep
<wingrime> Turl: also wake source settings should go over dt
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<arokux> Turl, cannot understand how it worked till now
<arokux> Turl, kz - zeros memory or?
<Turl> arokux: kzalloc is similar to calloc
<arokux> Turl, z does not stand for zero?
<Turl> arokux: yes, it allocates memory initialized to 0, like calloc
<arokux> ah, clk_data was allocated by kmalloc
<arokux> with garbage inside
<wingrime> Turl: I still not see sun7i patches in your sunxi-clk branch
<arokux> Turl, I though it was also allocated with kzmalloc
<Turl> wingrime: I still don't have sun7i :p
<wingrime> i impressed that there is customs worser than in russia
<Turl> wingrime: :)
<Turl> wingrime: tracking moved a bit today
<Turl> wingrime: 'in process of being classified'
<Turl> wingrime: it arrived more than 2 weeks ago to local customs
<wingrime> Turl: They plays angry-birds
<wingrime> on it
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<wingrime> Turl: also, wdt driver in your branch shold be rearranged to kernel patchset
<Turl> wingrime: haha
<Turl> wingrime: wdt branch is ancient
<Turl> wingrime: n01 is working on wdt
<Turl> I should convert it to tag for historic purposes and drop the branch
<wingrime> Turl: I for me mostly intersting how work on SDIO goes
<wingrime> Turl: also who will do disp
<Turl> wingrime: mripard_ is working on sdio
<wingrime> Turl: take a look my driver
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<Turl> wingrime: I see some style problems
<Turl> wingrime: function "{" should be on a new line I think
<Turl> wingrime: also some comment miss a space /* like this*/
<wingrime> Turl: ok, something about code
<Turl> wingrime: do not print your own OOM warning
<Turl> wingrime: dev_err(dev, "could not allocate device.\n");
<Turl> kernel already prints one
<wingrime> Turl: done
<Turl> same dev_err(dev,"not enough memory for rc device\n");
<wingrime> done
<Turl> wingrime: compatible should be "allwinner,sun4i-ir"
<Turl> we use first platform that has this IP for compatible
<Turl> wingrime: missing ">" on your MODULE_AUTHOR, also email is ".org" right?
<wingrime> ok ,also I should ask mnemoc add
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<Turl> wingrime: ir = devm_kzalloc(dev, sizeof(*ir), GFP_KERNEL);
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<Turl> do you need zeroed memory?
<Turl> use kmalloc if you don't
<Turl> devm_kmalloc
<Turl> hm weird devm_kmalloc doesn't exist
<Turl> nevermind then
<wingrime> kmalloc return only zeroed memory
<Turl> wingrime: typo "recived"
<wingrime> due sequrity
<Turl> wingrime: kzalloc returns zeroed memory, I'm pretty sure kmalloc doesn't
<wingrime> Turl: anyway I rewirte all after
<wingrime> Turl: also I sure that devm use slab
<Turl> wingrime: kmalloc and friends use slab
<Turl> devm_ is just auto cleanup
<Turl> wingrime: overall driver looks good :)
<Turl> bbl
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<wingrime> Turl: pitillo
<wingrime> Turl: ping
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<arokux> Turl, why cannot I set pll6 as parent? only "pll6 1" works.
<arokux> Turl, because it a cell clock..?
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<Turl> wingrime: I suppose you can use "linux,rc-map-name" then
<wingrime> Turl: or should I add this with next patch?
<Turl> arokux: #clock-cells=1
<Turl> wingrime: if you need it, probably
<arokux> Turl, yes, it is set
<Turl> wingrime: also write binding document like that
<Turl> arokux: that means you should include 1 extra value
<arokux> I want to add a clock which has pll6 as parent, not pll6_sata or pll6_other.
<Turl> like <&pll6 1> or such
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<Turl> arokux: pll6 has 2 outputs, sata or other
<Turl> your child clock should be connected to other
<Turl> (unless it's sata)
<arokux> Turl, no...
<arokux> Turl, my child is actually separate?
<Turl> arokux: you tell me? :p I dunno what your child is
<arokux> Turl, ok, i thought you know :)
<arokux> Turl, I just wanted to connect to the "root" of a cell <1> clock...
<Turl> the 'root' is kind of virtual
<Turl> pll has two outputs as described on documentation
<arokux> Turl, pll6 is strange. besides those two described, it also feeds a usb clock
<Turl> arokux: via 'other' output I imagine
<Turl> (because usb != sata)
<arokux> Turl, no, PLL6/25 is not other.
<Turl> PLL6/25 should be other/25 right?
<arokux> Turl, no, because other already has /2
<arokux> Turl, check manual page 43.
<arokux> and
<arokux> vim arch/arm/mach-sun4i/include/mach/ccmu_regs.h +398
<Turl> arokux:
<arokux> Turl, wrong somehow, pll6 should run at 1.2GHz
<oliv3r> backreading! :)
<Turl> arokux: pll6 is virtual
<Turl> arokux: _other runs at 1.2Ghz
<arokux> Turl, for me it runs at 6MHz
<Turl> arokux: what?
<arokux> 600*
<Turl> what device?
<arokux> mele a1000
<arokux> well, its according to docs
<Turl> that's a10, probably rev C, AW did a little magic dance on their driver with revc and pll6 and pll4
<wingrime> Turl: I hope 80 chars warning does not care
<Turl> wingrime: if it is strings you can ignore it, do not break grep of error
<arokux> Turl, so what now?
<Turl> wingrime: for code, it depends, it is flexible, but try not to break it much if avoidable
<Turl> arokux: what what?
<Turl> arokux: "PLL6/25" should be a "/25" fixed divider with pll6_other as parent
<arokux> Turl, but then it wont have 408MHz as required by usb
<arokux> 480*
<Turl> arokux: you mean 48?
<Turl> arokux: see my paste again
<arokux> Turl, no, 480
<arokux> Turl, hm, check page 36 in pdf
<Turl> arokux: 480 can't be PLL6/25
<arokux> USB_clk USB 480MHz Sourced from PLL
<Turl> arokux: that would make PLL6 12Ghz
<arokux> can, if PLL6 is 1.2GHz, as with my dev
<wingrime> arokux: Usb use 48
<wingrime> usualy
<Turl> arokux: 1.2Ghz/25 = 48Mhz
<arokux> Turl, oops, yes.
<Turl> arokux: now see the paste again :)
<arokux> Turl, :p
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<arokux> Turl, how do you think, what "PLL6 sample 24Mhz to generate 48Mhz" means?
<arokux> this is from ---> vim arch/arm/mach-sun4i/include/mach/ccmu_regs.h +398
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<Seppoz> hi
<oliv3r> woprr: our 3.4 kernel in hansg's repo is in reasonable shape, testing much appreciated :) mainline kernel is best from mripards a20/clocks wip tree as that's most up to date
<Turl> arokux: I dunno :p
<Seppoz> where would i find the defconfig for marsboard?
<Turl> Seppoz: marsboard is a10 right? sun4i_defconfig should be it
<woprr> oliv3r, official? links to git repos pls :)
<Seppoz> and is A10_MID_1GB the right board in uboot?
<Seppoz> or is there anyone thats more suitable?
<Seppoz> and yes A10
<woprr> will try the 3.4 kernel tomorrow, still on fixing the olimex supplied debian, random mac address, security updates etc
<woprr> setting up emdebian toolchain etc tomorrow
<woprr> hansg repo @kinux-sunxi.github or what are talking of
<woprr> installing security updates only from debian armhf, more may break the sunxi-linux core system
<Seppoz> btw: how is the GPIO support atm? is there an implementation for gpiosys yet or still the *ugly* implementaiton?
<oliv3r> i use checkpatch -f --strict
<oliv3r> wingrime: unless you copy/pasted anythinf from daniel wangs driver, i'd ommit that, you wrote it from scratch imo, it's very much different. I don't think it should have a second author until someone really overhauls it
<oliv3r> wingrime: rc-mapping, doesn't that depend on your remote? e.g. you can use any remote you want? or how would DT deal with that. Then again, each protocol has a fixed amount of keys defined that they map to input messages I would think? Not so easy nor obvious
<oliv3r> woprr: our offical 3.4 kernel doesn't have a20 support yet :)
<oliv3r> Seppoz: i think we added marsboard very recently to sunxi-current
<oliv3r> woprr: i would keep the nand 'as is' and only work from MMC
<wingrime> oliv3r: yes,but not always
<woprr> ok thx
<woprr> no nand here
<wingrime> oliv3r: you should add table for your remote teoreturcaly
<oliv3r> ah, so what are you booting from?
<oliv3r> wingrime: that sounds very user-unfriendly?
<woprr> the olimex delivered debian sd card 4G
<oliv3r> users hacking dt to support their remote?
<oliv3r> ahh ok
<wingrime> oliv3r: actualy its about rc-core
<oliv3r> if you have spare sd cards
<oliv3r> woprr: ^ that supports a20 :0-
<woprr> yes, hdmi, ethernet, ...
<oliv3r> woprr: that's the kernel used
<woprr> Linux vdr2 3.3.0+ #3 SMP PREEMPT Fri Jun 7 12:24:59 EEST 2013 armv7l GNU/Linux
<wingrime> oliv3r: aw have own table
<oliv3r> but its constantly evolving and should be merged into very soon
<oliv3r> wingrime: well aw has crap code ;)
<oliv3r> wingrime: i'll immediatly admit i don't know how 'normal' hardware does this
<wingrime> oliv3r: about autorship
<woprr> oliv3r, you said hansg before, what now...
<wingrime> oliv3r: we should ask mripard and Turl
<oliv3r> wingrime: I know of two kinds of setups, sometimes you buy hardware, that comes with remote and that mapping is saved
<oliv3r> wingrime: but I also know, that you can also use your device (vdr for example) that ask you to enter your keys so that it can configure itself
<Turl> wingrime: what?
<woprr> [ 0.000000] Linux version 3.3.0+ (root@bundie) (gcc version 4.5.1 (Sourcery G++ Lite 2010.09-50) ) #3 SMP PREEMPT Fri Jun 7 12:24:59 EEST 2013
<oliv3r> wingrime: I would expect, that most of the keymappsing are handled via the protocols
<woprr> olimex 4GB debian SDcard
<Seppoz> can the A10 boot from any sdcard or just a certain slot?
<Turl> wingrime: can keymapping be changed on runtime?
<wingrime> Turl: oliv3r ask about drop AW ownership from new driver
<oliv3r> Seppoz: i think it can boot from sd0 and sd2
<oliv3r> Seppoz: but check the wiki for specific boot info
<oliv3r> Turl: in theory, it should be changable, otherwise it kinda sucks hard :)
<Turl> wingrime: did you use AW code? yes -> keep it, no -> aw has no copyright, right?
<wingrime> oliv3r: I not handle protocols
<Turl> oliv3r: ever seen those "all in one" remotes?
<oliv3r> Turl: about the ownership thing, wingrime rewrote the whole thing, i don't think he copy/pasted anything, so there is no requirement to menition AW (unless they contributed, or significant code was used?)
<Turl> oliv3r: you need to configure them before use, they have huge tables for config :)
<oliv3r> wingrime: i think the RC framework handles the NEC, RC5 etc etc protocols
<oliv3r> Turl: duh
<Turl> oliv3r: s/significant //
<Seppoz> oliv3r: where would i font the boot info in the wiki?
<wingrime> oliv3r: yea
<oliv3r> Turl: that's a gray area, if i use 1 line i = 0; and it's also the same, but wasn't copy pasted, is that new code
<Turl> oliv3r: that's a bit extreme don't you think? :)
<Turl> if he took aw driver and rewrote it -> keep aw notice
<Turl> if you wrote it all from scratch, there is no need for aw notice
<wingrime> oliv3r: also thre Trivial criteria in LAW
<oliv3r> and i think wingrime rewrote it
<oliv3r> so drop AW!
<Turl> oliv3r: it's gpl in any case, it doesn't hurt to have it
<Turl> I'm not a lawyer though, so don't take my word for it
<oliv3r> Turl: once they start contributing, working with the community, sure i'd agree, but until then, personally, i'd walk as close to that thin line as I could to ommit their name from new code :)
<Turl> oliv3r: meh
<Turl> oliv3r: I'd care as much if you wrote (c) Microsoft, Allwinner or FSM, as long as the GPL thing is below
<oliv3r> lol of course, that has priority
<oliv3r> but emotionally, it sits on the wrong foot, when they took no effort to participate, but get 'full' credit (cause, what does anybody else really know)
<oliv3r> 'oh these AW folks are so cool, they are contributin!'
<wingrime> oliv3r: also LRADC more problematic, as it have no author metoned
<Turl> well, just make it clear if you want
<oliv3r> wingrime: we have docs, so we can rewrite it from scratch :)
<Turl> "Inspired by sun4i-ir, \n copyright allwinner blah blah"
<woprr> oliv3r, this is what You want tested ?
<wingrime> oliv3r: actualy there probem,
<oliv3r> Seppoz: i can't reply to you :p you can ask here :)
<Seppoz> im sorry but im really to stupid to find the boot info you refered to
<oliv3r> i'd find my password for linknet but i'm too lazy
<oliv3r> i saw sep :)
<wingrime> oliv3r: lradc realy simple ADC that assign some voltage to button
<oliv3r> ok i'll show you
<woprr> I don't understand what You mean "used"
<Seppoz> ty
<wingrime> oliv3r: and there tables
<oliv3r> woprr: ??
<oliv3r> wingrime: yeah it is very simple :) but you want to write it as an iio device, and we need a 'iio -> input' driver thing
<wingrime> oliv3r: IT like constants , if you edit it you will drop most tablets compatiblity
<wingrime> oliv3r: you can't change resistors on pcb
<Seppoz> is it this?
<woprr> <oliv3r> woprr: that's the kernel used == woprr: our 3.4 kernel in hansg's repo is in reasonable shape, testing much appreciated :) ?
<oliv3r> Seppoz: i wrote a neat table here:
<Seppoz> thanks
<wingrime> oliv3r: also avout copyright, If every one put own copyright to core linux files, Author list will becomes HUGE
<oliv3r> Seppoz: the A31 has a nice graph there, i didn't make a nice one :p the a10 and a20 manual have them though ;)
<wingrime> oliv3r: just imagine topic
<oliv3r> wingrime: exactly, personally i'd put the main author(s) on it, and if of course you do a really big overhaul, sure, otherwise, you are the first/main author of a new driver, you are the author
<oliv3r> Seppoz: the a10_boot_process is for the propriatary (now gpled for reference only) boot0/boot1 boot method
<oliv3r> woprr: the fedora19 image for a10 and a20 SoC's, uses this kerneltree :)
<Seppoz> i just figured that is meand thatnk you ver ymuch
<oliv3r> the pre-compiled binaries are included in hasng's image
<woprr> oliv3r, OK got context, thx
<oliv3r> Seppoz: so if you boot via the opensource GPL u-boot, only look at the BROM page, as that is what is build into the chip and we cannot change
<oliv3r> Seppoz: we should have NAND support maybe by years end (sooner/later depending on how much effort is put in by voulenteers :)
<Seppoz> oliv3r: is it safe to use sd2 to boot if we have nand on it?
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<Seppoz> i dont care for the nand at all
<Seppoz> i only wanna boot from sd
<oliv3r> Seppoz: nope, internal flash gets booted first, unless you invalidate it. i think olimex boards have a jumper that allows you to cause it to error out and skip
<oliv3r> if there's no nand connected, it won't try to boot from it afaik
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<Seppoz> so you say use sd0 then?
<oliv3r> Seppoz: remember, this boot order is in the CHIP itself, it cannot be altered, only 'tricked' (e.g. if there's no nand, it'll continue) this all is even before pinmuxing could possibly take place, since script.bin etc is not loaded nor parsed
<oliv3r> sd0 is used by default
<Seppoz> what do i do with the uart0 debug?
<oliv3r> it has the neat advantage, that you can use a uSD adapter -> Uart converter
<oliv3r> you can always debug using a different uart, but you would have to tell SPL about that change
<oliv3r> Seppoz: look at the cubieboard and olimex boards
<oliv3r> they offer uart + sd0 for boot
<oliv3r> they use uart1 if my mind serves me right
<Seppoz> ahh ok!
<oliv3r> but don't quote me on that ;) look up their pinouts
<Turl> arokux: that 1 bit is used to choose
<Turl> arokux: so 0b001 is first option, 0b010 is second and 0b100 is 3rd
<arokux> Turl, what should mask be in this case?
<arokux> Turl, well.. i have only one bit for a mux anyway, probably i do not need to care about it
<Turl> mask for my example there would be 0b111
<Turl> arokux: if you have just 1 bit mask is 1
<oliv3r> Seppoz: your welcome :)
<Seppoz> do you have any link to an usd adapter?
<oliv3r> you mean like that?
<Seppoz> yea
<oliv3r> note though, you can't boot from uSD0 if you use that to debug :)
<oliv3r> nn all
<Seppoz> thats what i just realized
<arokux> Turl, when clk_register_clkdev is needed after of_clk_add_provider?
<Turl> arokux: not completely sure tbh, I think maybe we need to drop those
<Turl> arokux: I believe they're used when you clk_get by name
<arokux> Turl, ok, I also noticed it worked without it, only with "add provider"
<Turl> mturquette: should we be using clk_register_clkdev?
<oliv3r> Seppoz: the cubieboard and olimexino have dedicated uarts for debugging
<oliv3r> Seppoz: if you are designing a device which will boot from nand, then sd -> uart is awesome, as you can boot from uSD in caseof recovery
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<arokux> Turl, my pll6 is running at 1.2GHz only
<deasy> hi
<deasy> i have follow the tutorial of archlinuxarm and after the install my cubie say it have 314MB of ram :/
<oliv3r> deasy: that's normal
<oliv3r> deasy: you are reserving 16mb for the framebuffer, 16 mb or so for the VPU, 16 or so for the GPU etc etc
<oliv3r> there's a wiki page on how to maximize memory
<deasy> okay i think my cubie is configured like 512MB
<deasy> my uboot say it
<deasy> but i have 1GB
<oliv3r> then you put the wrong u-boot on your SD card
<Turl> arokux: don't worry much about it, it just needs to be configured apropriately :)
<Turl> arokux: nobody is actually using pll6 yet
<arokux> Turl, well, I'm going to for usb!
<arokux> Turl, that is why i'm adding it at all :)
<oliv3r> Turl: except the CPU!
<Turl> oliv3r: cpu runs off pll1, not 6
<Turl> arokux: well, you'll eventually set the rate for your usb clock and that will configure pll6 accordingly
<oliv3r> arokux: from what i can see, USB has its own clock
<Turl> oliv3r: fed from pll6 from what I read :)
<arokux> oliv3r, vim arch/arm/mach-sun4i/include/mach/ccmu_regs.h +398
<oliv3r> i'm looking at the ccm wiki page
<oliv3r> USB_CLK ;p
<hno> oliv3r, only clock gates, right?
<oliv3r> not sure why I wrote what i wrote
<hno> link?
<oliv3r> i took it from the a10 manual, it may aswell have omitted ifo
<oliv3r> the 2nd or 3rd table
<arokux> I think the best is to take info from code
<arokux> or?
<Seppoz> oliv3r: where would i find a distro for the a10 to do a quicktest?
<hno> oliv3r & arokux, what is the question?
<arokux> hno, mm.. my PLL6 is running at 1.2GHz, the Turl 's at 2.4
<oliv3r> Seppoz: hansg; google hansg fedora19
<arokux> hno, I cannot understand should I worry or not
<oliv3r> pll6 can't run at 2.4
<hno> PLL6 should be 1.2GHz.
<Seppoz> ty
<Turl> the 2.4Ghz is virtual arokux
<oliv3r> Turl: ohh reset options; those go nicely in the new reset framework
<arokux> Turl, ok, but my virtual is 1.2 :)
<Turl> so yours runs at 600 and 100?
<arokux> this makes the clock for usb only half of the freq
<arokux> Turl, exactly
<oliv3r> arokux: what makes you think that
<oliv3r> afaik pll6 is fixed at 1.2 ghz, no way to change it
<arokux> cat /sys/kernel/debug/clk/clk_summary
<Turl> oliv3r: go read the manual :p it's not from what I can see
<oliv3r> unless you cange the extern 24 MHz oscilator that is
<arokux> Turl, are you sure your virtual runs at 2.4 then?
<hno> oliv3r, PLL6 is a PLL just like the others.
<Turl> arokux: look at the paste :p
<hno> See CCM_PLL6_CFG
<oliv3r> hno the manual said that it operates at a fixed freq. of 1.2 :p
<arokux> Turl, yep, did.
<oliv3r> that wiki page needs a serious update :p
<Seppoz> oliv3r: sorry that doesnt get me anything
<oliv3r> then again, i added the info from the manual
<Turl> arokux: I'm using an A10S though, it might just be different chip defaults
<Turl> as I said, these are unconfigured so far, they have default values from uboot/chip
<hno> oliv3r, it needs to be at 1.2 for SATA and some other things, but can be used at other frequiencies if you don't use those modules. It is one of the clock sources many things can be derived from.
<oliv3r> hno: then we should update the wikipage to reflect htat, i only entered the values in the first table as i saw it in the datasheet (not usermanual)
<arokux> Turl, mine is as by manual: 0x21009911
<arokux> Turl, checked after uboot, by md 0x01C20028
<hno> oliv3r, it is documented in the wiki..
<oliv3r> Turl should update the wiki page as he knows most
<oliv3r> hno: yeah the configuration TOO pll6; but in the top description, where it lists the capabilities of each of the clocks
<oliv3r> it says pll6: 1.2 GHz
<hno> oliv3r, says the capabilities of pll6.
<hno> but as I said... should be 1.2GHz.
<arokux> how to write something to register in kernel? can I do smth like.. *reg |= 0x20;?
<oliv3r> mind you, when I wrote that, I knew nothing of pll's and didn't even own a cubie or nothing, only ha dmy tablet and lots of interest :)
<hno> can be set to other rates but you better know why you do that.
<oliv3r> arokux: reg = ioread32(address); reg |= DEFINE20; iowrite32(address, reg); (in pseudo code)
<oliv3r> so 2 datasheets and a wii editor is all I had :)
<oliv3r> wiki*
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<arokux> oliv3r, DEFINE20?
<hno> arokux, you can do that on arm in some cases, but better to use writel/readl and related functions, much les pitfalls. Or ioread/write as oliv3r said
<oliv3r> arokux: what does 0x20 mean, you can't just write a random value to a random register :)
<arokux> oliv3r, it's not random :)
<oliv3r> arokux: to you its not, to a random bystander reading your code it is :)
<arokux> oliv3r, the point is there is one bit, which is switched for Rev C
<arokux> oliv3r, it is just for testing..
<arokux> oliv3r, i want to switch this bit
<arokux> __u32 ClkSwich:1; //bit5, usb clock switch
<oliv3r> so you'd do reg |= BIT(5); :)
<hno> arokux, pll1 apparently unreliable on Rev C, so they use PLL6 instead if available.
<arokux> hno, can i really measure somehow what the freq of the clock is?
<hno> I don't think so.
<oliv3r> oscilloscope :)
<hno> requires the clock to be routed out of the chip first...
<Turl> oliv3r: inside the soc? it's gonna be fun
<oliv3r> i know a20 has something called clk_outa; clk_outb;
<Turl> hno: I think it's pll4
<hno> and at all trying to look with a oscilloscope at signals in GHz range is interesting...
<oliv3r> yeah,my scope can' thandle that
<oliv3r> i got one of those cheap rigols
<hno> Turl, that's broken? Could be, memmory is a bit dim on the details.
<oliv3r> 100 MHz bandwith
<oliv3r> i think it was pll4 too
<hno> oliv3r, it's not trivial to at all attach to a such signal without introducing major disturbances.
<oliv3r> remember vaguely somewhere mentioning
<hno> we fighted with that one for months.. but was too long ago.
<oliv3r> ok really have to put the laptop down and close eyes, 10+ hour drive ahead tomorrow
<arokux> <oliv3r> so you'd do reg |= BIT(5); :)
<arokux> oliv3r, not *reg = ..; ?
<oliv3r> and i'll try to mail off the sunxi_sid for testing to linux-sunxi, but can't test on a20 till i get back
<oliv3r> arokux: u32 reg; reg = ioread32(address); reg |= BIT(5); iowrite(reg, address);
<hno> arokux, depends on wat reg is.
<arokux> void *reg;
<oliv3r> and where does *reg point too?
<hno> not in oliv3r code. But in your first one yes,
<arokux> to where it should :P
<arokux> hno, with oliv3r it's clear
<hno> doesn't kernel have clrsetbits family of macros? Or is that only u-boot?
<hno> seems it has.
<hno> or maybe only on powerpc.. strange.
<hno> those are quite nice for readable bit manipulations.
<mturquette> Turl: no reason not to use it
<oliv3r> hno: setbits() and clrbits() it has
<oliv3r> i haven't checked on which platform they do/do not work
<oliv3r> but I don't see why arm shouldn't have them
<Turl> mturquette: basic clocks (fixed rate for example) lack it btw
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* mturquette will look into it.
<hno> oliv3r, I can only find thise too on powerpc.. find . -name include | xargs grep -R clrbits
<arokux> Turl, would you like to get a patch from me which adds support to usb clocks?
<arokux> Turl, otherwise I'm not sure how can I push it to public. it is based on your branch...
<hno> oliv3r, and why are we still talking? bedtime.
<hno> 55.598203,13.025615
<arokux> hno, how do you send patches, from command line?
<hno> arokux, I always fail in various details.. but see git format-patches.
<arokux> :)
<arokux> yep
<hno> night
<Turl> arokux: sure, I can take it and send it as part of my series if you wish
<arokux> Turl, should I sent it to the linux-sunxi, then?
<Turl> arokux: as long as I can see it it's ok for me
<arokux> Turl, ok, I've sent it to you
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<arokux> and ML
<arokux> now that I have usb clock I can start with usb host.
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<Turl> arokux: are you sure of pll6_mult_2?
<Turl> 2.4Ghz clock sounds like too much
<arokux> Turl, no, not at all...
<arokux> "PLL6 sample 24Mhz to generate 48Mhz" -- I've thought it is multiplication..
<Turl> it's something that should result in 48Mhz from what I understand
<Turl> I guess we'll need to ask AW
<arokux> Turl, can we?
<Turl> arokux: hm, so you are registering 3 composite clocks?
<arokux> Turl, yes, if this is ok
<Turl> arokux: not sure tbh :) but I'll try to find out
<Turl> arokux: you are registering 3 mux too
<arokux> Turl, 3 x composite of mux+gate
<Turl> iirc the framework has a cache (mturquette correct me if this is not the case), so I would expect issues with 3 identical muxes
<arokux> Turl, they have different name though?
<arokux> names*
<Turl> arokux: yes, but they use the same register
<Turl> so if one changes the mux the others might not even notice
<Turl> arokux: you also have 3 outputs but #clock-cells=0
<arokux> Turl, true.
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<arokux> Turl, concerning mux. if this is going to be an issue. we can add one clock just for muxing and the 3xgatable on top of it, or?
<Turl> arokux: I'd make a mux, then 3 gates with it as parent and put them behind an onecell provider
<Turl> arokux: but not sure how you would reparent then
<arokux> Turl, let's wait till mturquette answers
<Turl> ok