<wens>
I'm not familiar with JTAG, but I think what you're asking for doesn't exist
<junnie>
swiftgeek: it is secure JTAG on H3. Do you have doc/information on how to enable it?
<swiftgeek>
wens: nah it has to exist :D
<swiftgeek>
wens: boundary scan is the reason why JTAG exist in first place
<swiftgeek>
junnie: what do you mean?
<lurchi__>
swiftgeek: boundary scan is only one of several scan chains ...
<swiftgeek>
lurchi__: yep
<junnie>
swiftgeek: I am not sure whether configuring pinmux is enough to enable JTAG.
<swiftgeek>
some SoCs have JTAG_SEL (A80 seems to have it)
<smaeul>
I don't know about H3, but on H5 at least, the boot ROM enables the JTAG functions pinmux when entering FEL
<smaeul>
so maybe that's all it needs?
<swiftgeek>
H3 has 2 JTAG_SEL as well
<junnie>
smaeul: do you see JTAG is ready for normal boot? I see the default pinmux function is GPIO on H3 document. Not sure about H5.
<smaeul>
i don't have a H3 BROM dump handy
<wens>
swiftgeek: let me rephrase, it probably doesn't exist in public :)
<swiftgeek>
yep that goes for every chip sadly
<swiftgeek>
and i really need some actual example how it looks like for some pin
<wens>
beeble: have you guys played with jtag?
<swiftgeek>
Found "PM_STANDBY_ENABLE_JTAG"
<smaeul>
junnie: the function to enable JTAG is only called on the FEL boot path, but like I said, it's just the pinmux, so you could always do it yourself later
<swiftgeek>
btw is there any decription how security-jtag-key is used?
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<junnie>
smaeul: sure, gpio can be configured in code. I had concern that whether secure JTAG matters here. It seems that JTAG is open as long as the SoC is not secure locked yet.
<smaeul>
again, just sets the pinmux. so with that everything should just work™
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<swiftgeek>
BCM2835 doesn't have BSDL public either :<
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<jernej>
mirko: I don't know much about USB driver, so someone else could help you more
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<beeble>
wens: iirc it's just to do the pinmux. could be that BROM does it already if it goes to FEL, but can't test right now as my debuggers are now set up for rk devices (different pinmux on sd card pins)
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<Jagan>
anyone tried u-boot ums on h5 or a64?
<junnie>
ums does not work on h3 and need to port usb ep config change. I guess it shall be apply to h5.
<mripard>
jernej: no, the commit id won't change
<mripard>
jernej: once applied, it's all pull requests
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<junnie>
swiftgeek: I already connect H3 with openocd. Do you need tcl script?
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<montjoie>
wens: since mostly all H3 boards with internal PHY use allwinner,leds-active-low, what do you think about set is as a default, and then create leds-active-high
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<wens>
montjoie: not much point to it
<montjoie>
wens: it will clean heavily DT
<montjoie>
and easy my allwinner,leds emac-to-phy patch
<wens>
mripard: ^
<mripard>
montjoie: you're not going to get anywhere changing the binding all the time
<mripard>
montjoie: everyone agrees to one thing, and you want to do something else?
<mripard>
that's pointless and you're going to be under time pressure, again
<montjoie>
mripard: what was asked is to move allwinner,leds from &emac to a new &internal_phy in board dT
<montjoie>
and I need to revert the patch dmiller applied
<montjoie>
Instead I could just remove leds,allwinner from board DT and still need to change dwmac-sun8i
<mripard>
yes, and it looks like it's plenty of work already
<mripard>
why would you want to do more than that
<montjoie>
because its cleaner
<mripard>
and change what everyone has been agreeing on before
<mripard>
well, it's too late for that
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<montjoie>
ok I will split in two, move as asked, and then try to change...
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<wens>
montjoie: to be fair, I don't see any point in moving the property either
<montjoie>
it is asked by andrew
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<wens>
I can't find the first version of the DT bindings right now, but IIRC it was like that from day one
<montjoie>
I know
<wens>
I would rather have something working for this release, rather than risk delaying it by two more releases
<montjoie>
I just need to verify that it affect only internal PHY
<montjoie>
if this register (LED low/high) affect also non-internal PHY, it must be kept on emac node
<wens>
no it doesn't
<wens>
it's the syscon register bit
<wens>
why would it affect external PHYs?
<wens>
for external PHYs, it's either something fixed in hardware, or the setting is latched at startup from external config pins, and could possibly be configured via MDIO
<wens>
montjoie: I could argue that this is part of the platform glue layer, because it exists outside of the PHY, and is probably an inverter along the path
<montjoie>
anyway I have found gigabit board with this property, I will send a patch for remove it
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<swiftgeek>
junnie: i guess not unless you have some example boundary scan in there
<mirko>
I'm not exactly sure what you mean.. "usb 1-1: new full-speed USB device number 2 using ohci-platform", would ohci be the answer to your question then?
<wens>
there are 4 usb controllers on the h3
<wens>
though... for the h3, you won't be using the otg controller in host mode
<mirko>
i'm on an OrangePi Lite
<icenowy[m]>
jernej: are you going to submit H3 DE2 patch?
<icenowy[m]>
P.S. one plane for one channel configuration has a problem -- mixer1 won't be able to display video with hardware overlay
<icenowy[m]>
as there's only two planes
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<icenowy[m]>
but three are needed (user interface, video, cursor)
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<wens>
cursor plane is optional
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