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<somlo>
daveshah: `make prog` in TrellisBoard/gateware/simple gets me a spinning multicolored LED "snake" in the upper-right corner, I assume that means it works :)
<daveshah>
It may only give 512MB by default without changes to soc_sdram
<somlo>
I was about to study soc_sdram and how I could bypass the main wishbone bus and connect the sdram datapath directly to the rocket chip's cached axi port, natively at 64bit
<somlo>
should be easy
<daveshah>
Yeah, that makes sense
<somlo>
but I decided to procrastinate and test the trellis board instead, it's Friday after all :)
<somlo>
so all I'm saying is that tinkering with soc_sdram is a timely thing :)
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<forksand>
somlo: congrats looks great. :)
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<somlo>
forksand: thanks, I'm really happy and relieved Sierra Circuits (protoexpress.com) managed to get it right
<somlo>
but credit goes to daveshah for answering their pcb engineering questions, I personally felt lost in the sauce, like a meatball :D
<forksand>
somlo: cool you went with sierra circuits / protoexpress. Had you used them before or had you seen that is who I used? Cuz that is who I used too.
<forksand>
I went to the KiCAD conference website and checked out all the board houses that sponsored it and checked them out. I really like protoexpress ticketing system.
<somlo>
forksand: they were recommended to me by my uni's ECE folks, total coincidence w.r.t. you using them as well :)