_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://freenode.irclog.whitequark.org/litex
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<awygle> Are there any known issues with the litedram register interface? like, something that would be different if it was rewritten today? or are folks pretty happy with it?
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<_florent_> kbeckmann: we are also working on https://github.com/litex-hub/litespi, in a first time to replace the spi_flash code with it and later to also enable use with (Q)SPI-RAM
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<kbeckmann> _florent_: oh wow i completely missed that project. that looks really nice and promising.
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