_florent_ changed the topic of #litex to: LiteX FPGA SoC builder and Cores / Github : https://github.com/enjoy-digital, https://github.com/litex-hub / Logs: https://freenode.irclog.whitequark.org/litex
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<_florent_> mithro: thanks, good idea, i'll add this (that's already in Linux-on-LiteX-VexRiscv README but could emphasize things here yes)
<_florent_> loxodes: i could have a closer look tomorrow if you want
<loxodes> _florent_: thanks for the offer, first let me see if I can come up with a minimal project that replicates the issue
<loxodes> I see there is now a wishbone dma writer core, I'll try that
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<loxodes> _florent_: If you think this is worth investigating, I've replicated the problem on a fresh project which uses the wishbone dma writer core here: https://github.com/loxodes/dma_burst
<tpb> Title: GitHub - loxodes/dma_burst: Project to illustrate issue with writing to memory on LiteX (at github.com)
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<zyp> loxodes, that looks like a fun issue to debug
<zyp> loxodes, there seems to be a pattern to it, notice how it only succeeds for 0b000xxx, 0b001xxx, 0b011xxx and 0b111xxx
<zyp> I bet if you extend it from 64 to 256, it'll also fail for 64-119 and 128-247
<mithro> _florent_: I would like to figure out a way that you can "automagically" also use any FuseSoC module in LiteX
<loxodes> zyp: good point, I'll try and dig into patterns on where it fails. extened to 256, it tends to fail on either 16-23, 32-55, 96-255 or 16-31, 40-55, 96-255
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