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<Melkhior>
@_florent_ hello ; to test the FPU, do we need to use the 'fpu' branch from VexRiscv in pythondata-cpu-vexriscv-smp ?
<Melkhior>
@_florent_ hello ; to test the FPU, do we need to use the 'fpu' branch from VexRiscv in pythondata-cpu-vexriscv-smp ?
<Melkhior>
currently linux-on-litex-veriscv fails to regenerate the verilog (for me) as VexRiscv doesn't understand --fpu= but litex already pass it unconditionally
<Melkhior>
currently linux-on-litex-veriscv fails to regenerate the verilog (for me) as VexRiscv doesn't understand --fpu= but litex already pass it unconditionally
<Melkhior>
(trivial to fix if you dan't want the FPU)
<Melkhior>
(trivial to fix if you dan't want the FPU)
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<rozpruwacz1>
_florent_: I pushed pull request to litex with change that allows the GPIOIn module to trigger interrupt on both edges. This is required for example for the "card detect" signal if the sd card in spi mode to work in interrupt mode (without this only polling mode is possible). https://github.com/enjoy-digital/litex/pull/857
<rozpruwacz1>
_florent_: I pushed pull request to litex with change that allows the GPIOIn module to trigger interrupt on both edges. This is required for example for the "card detect" signal if the sd card in spi mode to work in interrupt mode (without this only polling mode is possible). https://github.com/enjoy-digital/litex/pull/857