<sajattack[m]>
lol I typed lspci after flashing and my computer rebooted itself
<sajattack[m]>
attempting to load the kernel module also results in a kernel panic/reboot
<sajattack[m]>
unfortunately there's a gap in the journalctl log between the command to load the driver and the next boot
<sajattack[m]>
kernel 5.11.8
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<sajattack[m]>
ok, got the `/dev/litepcie0` showing up now, but `litepcie_util info` locks up my computer for about 30 seconds, doesn't reboot
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<tcal>
I'm trying to do a basic build of litex_boards/targets/crosslink_nx_evn.py with the default tools; it builds ok, but doesn't want to load or flash. The Lattice programmer gives an error; ecpprog says things are fine, but the LED chaser doesn't start. Could my problem be that I have an ES (eng sample) part? Or that I'm using Radiant 2.2? I'm happy to move on to using PrjOxide if that will solve my problems...I was
<tcal>
trying to do things one step at a time.
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<tcal>
Hmm, I'm having better luck using Radiant 2.0.1. LED chaser is working. I haven't gotten the Litex> prompt yet, but I suspect my `--serial=serial_pmod0` is getting dropped since the pin assignments for tx/rx aren't correct.
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<tcal>
Yeah, `--serial` is ignored. This is what finally worked for me (using Radiant 2.0.1): `python3 ./crosslink_nx_evn.py --cpu-type=vexriscv --cpu-variant=full --uart-baudrate=115200 --uart-name=serial_pmod0 --build --load`
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<gatecat>
tcal: yeah you will need to stick with Radiant 2.0.1 if you have an ES device
<gatecat>
2.1 and later will use the production IDCODE
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<leons>
I currently have access to a NetFPGA 1G-CML card with a XC7K325T Kintex FGPA (same as used on Genesys2)
<leons>
I have never ported LiteX to another board (only every used it on my Arty A7)
<leons>
Is there a rough estimate of how much effort it would be to get it to a basic working state with LiteX? :)
<leons>
(Given that at least the FPGA itself is currently supported in other boards)
<acathla>
What should I change to so I don't have that warning? I copied the import from the fomu target but still have the warning
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<gatecat>
> Is there a rough estimate of how much effort it would be to get it to a basic working state with LiteX? :)
<gatecat>
ime it's usually a couple of days to get a board fully working and debugged
<gatecat>
leons: ^
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<leons>
gatecat: That sounds good. I'm somewhat optimistic because there's at least schematics and everything, but I don't quite know what to expect :)
<acathla>
_florent_, forget about it, I had an import still importing the wrong file
<_florent_>
acathla: I'm indeed trying to mode all the Retro-compatibility code (mess? :)) to a single location: litex.compat. up5kspram was already an empty file with just a redirection.
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<tcal>
@gatecat thanks, I'm installing PrjOxide right now, really excited about seeing it work on NX!
<gatecat>
adding `--toolchain oxide --nexus-es-device` to the LiteX command line should be enough to enable it
<sajattack[m]>
anyone have any ideas why the litex kernel driver is hanging or crashing my pc?
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<_florent_>
sajattack[m]: I'm going to rebuild the Acorn PCIe to verify
<Melkhior>
For the more alphabet-inclined among you, following Dolu1990's quick correction of a minor bug affecting C+FD, VexRiscv can now be used as a RV32IMAFDCBK core in LiteX and presumably other SoCs:-) That's a lot of letter for a a small core (can be abreviated to RV32GCBK but where is the fun in that ?)
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<tcal>
@gatecat -- confirmed it works! -- on the board, have litex> prompt. Used `./crosslink_nx_evn.py --cpu-type=vexriscv --cpu-variant=full --uart-name=serial_pmod0 --uart-baudrate=115200 --nexus-es-device --toolchain=oxide --build` and ecpprog (nx_support branch).
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<_florent_>
mithro: alexforencich's work is very interesting yes, the cocotbext-pcie project could be interesting to replace the simple model I created for LitePCIe:
<_florent_>
but this model has been enough for now and what's really missing int LitePCIe tests are the simulation unit-tests
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<mikeK_de1soc>
I just noticed that I am getting a update error: SoCSDRAM is deprecated since 2020-03-24 and will soon no longer work, please update. Switch to SoCCore/add_sdram/soc_core_args instead...........thanks :)
<mikeK_de1soc>
Is there a procedure for this? thanks!
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<_florent_>
mikeK_de1soc: yes you can probably just the following import: from litex.soc.integration.soc_sdram import *
<mikeK_de1soc>
Ah ok... :)
<mikeK_de1soc>
thatnks.
<_florent_>
and then replace soc_sdram_args/soc_sdram_argdict with soc_core_args/soc_core_argdict
<_florent_>
Note that this is not an error since the design will still build, but the compatibility will be removed at some point so I would recommend to update
<mikeK_de1soc>
yup...
<mikeK_de1soc>
that's why I am asking... Thanks!!! for the help!! (You are always so helpful Florent!! :) )
<mikeK_de1soc>
but I am having another issue building the arrow video terminal.. But this could be at my end...
<mikeK_de1soc>
INFO:SoCCSRHandler:leds CSR allocated at Location 6.
<mikeK_de1soc>
Traceback (most recent call last):
<mikeK_de1soc>
File "./arrow_sockit.py", line 202, in <module>
<mikeK_de1soc>
main()
<mikeK_de1soc>
File "./arrow_sockit.py", line 186, in main
<mikeK_de1soc>
soc = BaseSoC(
<mikeK_de1soc>
File "./arrow_sockit.py", line 166, in __init__
<_florent_>
./terasic_sockit.py --with-video-terminal --build is compiling here
<mikeK_de1soc>
SWEET!!!
<mikeK_de1soc>
Ok i guess I am at the bleeding edge....
<mikeK_de1soc>
does it matter if you do the --build first or last??
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<_florent_>
no, that's similar
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<mikeK_de1soc>
Oh WOW huge changes...
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<mikeK_de1soc>
Sorry Florent: another questions, The last link you gave me, is that for all branches? or just the master branch?
<mikeK_de1soc>
gone...
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<sajattack[m]>
<_florent_ "OK, so just loading the kernel m"> loading the kernel module crashed a few times, then I got the /dev/litepcie0 showing up, and litepcie_util info made it hang for 30 sec-ish but not reboot
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<leons>
Regarding building bitstreams for Kintex-7, that unfortunately doesn't work with the WebPACK edition. Given I'm not using it for commercial use (literally evaluating w.r.t to Vivado's terms and conditions), can I use the Vivado Design Suite 30day evaluation license for that?
<leons>
Sorry for asking - this isn't a Vivado license forum, but I really don't understand their approaches to licensing :)
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<keesj>
anybody played with the quickfeather?
<keesj>
I have the hardware , listend to the AMP hour episode on the subject. know about the next *umo device that is supposed to use the EOS S3 but do not quite understand how to .. get started / why I need the qorc sdk
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<gatecat>
7:37 PM <leons> Regarding building bitstreams for Kintex-7, that unfortunately doesn't work with the WebPACK edition. Given I'm not using it for commercial use (literally evaluating w.r.t to Vivado's terms and conditions), can I use the Vivado Design Suite 30day evaluation license for that?
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<gatecat>
yeah the evaluation license should be fine to get things going
<gatecat>
does mean you have a bit of time pressure though :p
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<leons>
gatecat: yes, that's pretty unfortunate. I would've hoped that one might be able to get 2 evaluation license periods, but efforts in those direction are probably futile
<leons>
Well, the 30 days should be sufficient, then I can go search for FPGAs of other vendors with more student-friendly licensing schemes
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