sb0_ changed the topic of #m-labs to: https://m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
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<bb-m-labs> build #2488 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/2488
<bb-m-labs> build #2967 of artiq is complete: Failure [failed python_unittest_2] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/2967 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
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<sb0> rjo: it's not 16 (I'm getting completely random phases with 16) but there is something going on there. when I use 18MHz instead of 9MHz, I'm still getting a sync non-determinism of ~pi radians, so, the "55ns" bug is in SAWG, the compiler, or that kernel - and not in JESD
<sb0> or it's 16 but 17 is partially masking another bug
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<rjo> well. the math says it should be 16. 17 is conceptually wrong. 16 being "worse" doesn't make 17 correct. 17 is actually consistent and would fully explain a pi shift. in any case: you only need to multiply the 32 LSBs of the TSC with the 32 bit FTW and take the LSBs of that. what was the result of the other suggestion of avoiding the potential 64 bit brokenness?
<rjo> *consistent with
<rjo> maybe not fully. but i don't see why 17 is correct. i'd suggest isolating this.
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<plonk> Ohai! Is this the right place to ask things about smoltcp?
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<plonk> specifically, I'd like to use it to reassemble tcp streams from pcaps
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