01:07 <azonenberg> Just thoughtds for you guys

01:08 <azonenberg> look at how MIPS does segmentation in nommu builds

01:08 <azonenberg> as well as in mmu builds

01:08 <azonenberg> the kernel has two segments with a constant offset to go from cached to uncached

08:39 <GitHub125> [llvm-lm32] sbourdeauducq force-pushed master from 1ccd614 to 8822bd8: http://git.io/46BBhA

08:39 <GitHub125> [llvm-lm32/master] Since LM32FrameLowering::hasReservedCallFrame() always - Stefan Kristiansson

08:51 <Fallenou> 23:26 < mwalle> Fallenou: what is I/DTLBMA? < ITLBMA is address in fetch stage that caused the ITLB miss. DTLBMA is address in memory stage that caused the dtlb miss

08:52 <Fallenou> for the CSR ids refer to https://github.com/fallen/milkymist-mmu/wiki/Documentation-of-milkymist-mmu

08:52 <Fallenou> they are alias to already existing CSR

10:06 <GitHub155> [llvm-lm32] sbourdeauducq pushed 1 new commit to master: http://git.io/fvxjjg

10:06 <GitHub155> [llvm-lm32/master] Support for byval aggregate arguments - Stefan Kristiansson

12:04 <Fallenou> mwalle: I am a bit busy this week-end (cause participating to ICFP 2012 programming contest) but next week I will have plenty of time :)

12:04 <Fallenou> will answer your email

21:23 <qi-bot> The firmware build was successful, see images here: http://fidelio.qi-hardware.com/~xiangfu/build-milkymist/milkymist-firmware-20120714-2140/