<wolfspraul>
wow, so nice to see the mmu documentation evolving
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<kristianpaul>
lekernel_: this looks like a proper way get 5 bit csr support for you http://fpaste.org/NwrP/raw/ ?
<kristianpaul>
s/proper/upstream
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<Fallenou>
cladamw: hey :)
<Fallenou>
very good news !
<Fallenou>
So R4 is finished finished ?
<cladamw>
Fallenou, hi just design files( sch, routes, gerber files)
<Fallenou>
so it's ready for manufacturing ? :)
<cladamw>
they are done from altium design version not KiCad. :-)
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<Fallenou>
sure, for now only schematics are done in KiCad, right ?
<cladamw>
yes, also includes footprints in KiCad is also done.
<Fallenou>
awesome
<cladamw>
(initial done) for KiCad, since no one has given feedback or review so far. if more one to review that is very welcome.
<Fallenou>
unfortunately I don't have any skill in schematics/routing, sorry :'
<cladamw>
btw, m1r4's footprints are very common to use in other projects though. Take those footprints if you like or to modify or maybe fix potential bug. :-)
<cladamw>
not sure how many people use Fped to generate footprints now. :-)
<lekernel>
then I just renamed "mico32" into "lm32", otherwise clang was looking for tools named mico32-elf-ld etc.
<Jia>
is offical clang have this feature?
<Jia>
and, sbourdeauducq make this change?
* Jia
can using clang instead gcc in my work!
<lekernel>
no, it's not merged yet (neither is lm32 support)
<lekernel>
i'm sbourdeauducq
<Jia>
you should summit this to clang-commits! It is very cool!
<Jia>
lekernel: and, when you summit it to clang-commits, I'll ping for you :-)
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<stekern>
yeah, I agree, I find the notion of a baremetal toolchain useful as well (i've been thinking about cherry-pick it into clang-or1k ;))
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<Jia>
lekernel: your email?
<Jia>
sebastien AT milkymist.org is OK?
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<lekernel>
yes, got it... thanks!
<lekernel>
kristianpaul: looks quite ok, except that you probably need to fix the address slice in csrbrg too. but why not just use -ng?
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<kristianpaul>
lekernel: to be honest but not offesive of course, i think ng besides the memory improvement is over eng effort
<kristianpaul>
and just offer me another layer of posible trouble besides verilog machine generated code :)
<kristianpaul>
i would not mind at first automate the arbiter generation for example
<kristianpaul>
using makefiles or some more basic scripting...
<wpwrak>
that's often the more expedite approach: handle the highly structured generation task in a script that you feed with the interface definitions (signal names or whatever), then include the result in the rest of your program
<lekernel>
kristianpaul: and you know, of course, that with migen your messy change would be a 1-line patch for the whole system, right?
<wpwrak>
e.g., you see very few people write C/C++ preprocessors these days. it's much more common to just generate a few .c/.h files and use these
<wpwrak>
(of course, verilog has an awkward preprocessor, which diminishes its value)
<kristianpaul>
lekernel: yes i know
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<Fallenou>
wpwrak: reading your email !
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<Fallenou>
wpwrak: you wrote about IE because IE has a lot of unused bits I could use as a status and control register for *TLB ?
<wpwrak>
IE because it is already saved in this sort of context. and yes, it has a lot of unused bits, too :)
<Fallenou>
ok good idea
<Fallenou>
wpwrak: what you call X.USR is whether we are in the kernel or user land ?
<wpwrak>
yes, 0 for kernel/supervisor (i.e., CSR unrestricted), 1 for user (i.e., CSR restricted)
<Fallenou>
ok
<Fallenou>
so basically the switch_to_kernel/user_mode function of TLBCTRL CSR would be moved to IE CSR
<Fallenou>
which has the nice backup/restore feature
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<wpwrak>
yup, that's the idea. may make things easier than having to tweak a number of other CSR registers
<larsc>
we could really use a mode flag for the IE register even for non-mmu mode. right now we have to emulate this using a global variable
<larsc>
which is kind of tedious, because you have to pay carefull attention to race condtions
<larsc>
careful
<larsc>
I always write all these -ful and al- words with two l's, that's kind of annoying
<wpwrak>
a kernel mode flag ? or a disable/enable interrupt flag ?
<Fallenou>
kernel mode flag I think
<larsc>
kernel/user mode flag
<larsc>
yes
<larsc>
and opencores has it too in non-mmu mode, iirc
<Fallenou>
wpwrak: about the last comment of your email, you mean making sure legacy code that used to play with IE csr don't overwrite/drop TLB flags ?
<wpwrak>
almost every architecture has some supervisor/kernel mode. i'm a bit surprised LM32 doesn't have it already.
<wpwrak>
Fallenou: yes. plus, be able to control IE.IE without having to worry about the TLB
<larsc>
oh and access to the csr register should be disabled in user mode
<larsc>
registers
<Fallenou>
usually when you modify a CSR, you read it first in an unsigned int, then you modify and you write it back
<wpwrak>
at least writes
<Fallenou>
larsc: sure
<Fallenou>
so you should never lose TLB flag in IE if you touch IE.ie
<larsc>
wpwrak: I wouldn't worry too much about legacy applications
<larsc>
we are not intel ;)
<Fallenou>
+1
<wpwrak>
larsc: well, it's just painful if you introduce quirks :)
<Fallenou>
it's not quirk, it's normal that if you modify a CSR you don't overwrite flags
<Fallenou>
you just read it, |= / &= and write it back
<Fallenou>
all legacy code should have done it this way
<wpwrak>
nasty surprises could include a "supervisor mode" bit which, if you clear it by accident, disables access to the CSRs. that would send you bug-hunting for a while :)
<larsc>
how much legacy code is there?
<Fallenou>
rtems code/flickernoise code
<Fallenou>
and actual linux port
<Fallenou>
indeed current milkymist bios code does irq_enable(0); and irq_enable(1); without reading IE :x