<hellekin>
so, when I meet with the guys from CEITEC, the chip fab in Brazil, what should I tell them to convince them to build free hardware?
<wpwrak>
hellekin: "it's fun" ? :-)
<wpwrak>
hellekin: what kind of chips do you have in mind ?
<hellekin>
wpwrak: I think the best compromise would be some router stuff. They do have radio engineers, but mostly to produce RFID, so it's probably not the same as proper RF or WiFi
<hellekin>
but in general, I'd like that they think about producing public infrastructure, so cheap mesh networking would be best
<wpwrak>
shall we move it to #qi-hardware ?
<hellekin>
as a fallback, PBX chips could be interesting. I don't see any of non-leaders building consumer nanoware anytime soon. A smartphone is very unlikely, although Brazil does have some local production (e.g., gradiente)
<hellekin>
could be
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<wpwrak>
hmm. board-m1/r4/m1.net - why ?!? it's a generated file
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<Fallenou>
I think I know why adding the rcsr to the itlb miss handler made it work, and removing it made it go in endless loop
<Fallenou>
somehow the value (modulo 16) of the address of instruction doing the eret is important
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<Fallenou>
because if you have a icache miss while doing eret, you are going to tlb miss during itlb handler
<Fallenou>
because icache miss is delaying the pipeline movement
<Fallenou>
so if eret address is a multiple of 0x10 then you lose (or something like that)
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<mwalle>
Fallenou: athough you can do ops with vaddr now in one operations, you still need one more instruction for the or ;)
<mwalle>
Fallenou: how many bits are unused in the VADDR register?
<Fallenou>
hum I would say something like 11
<Fallenou>
depends on your page size though :)
<Fallenou>
for 4 kB pages, you have 12 unused bits, one you have to keep for TLB selection
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<mwalle>
and we encode the operation in that free bits, now?
<mwalle>
except for update, which is implcitly done with writes to paddr
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<Fallenou>
yes that's what we agreed on :)
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<mwalle>
update is not atomic, but i guess thats ok
<Fallenou>
update should run only in miss handler with no exceptions
<mwalle>
Fallenou: wheres the valid bit?
<mwalle>
eg if i want to read back a TLB entry
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<GitHub36>
[linux-milkymist] sbourdeauducq pushed 1 new commit to ng: http://git.io/9z25hg