lekernel changed the topic of #milkymist to: Milkymist One, Migen, Milkymist SoC & Flickernoise :: Logs: http://en.qi-hardware.com/mmlogs :: EHSM Berlin Dec 28-30 http://ehsm.eu :: latest video http://www.youtube.com/playlist?list=PL181AAD8063FCC9DC
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<azonenberg> lekernel: so i did some reading and it seems that if you are willing to pay the $100+ per 10gig SFP+ transceiver
<azonenberg> you could have a kintex-7 talk directly to a SFP+
<azonenberg> and do 10gbe with no need for an external PHY
<azonenberg> This of course assumes you are running over fiber optics
<azonenberg> The other option would be infiniband using bare GTPs with no other external components except maybe TVS diodes or a buffer
<azonenberg> You cannot do a switch with the 70T though, unfortunately
<azonenberg> the GTPs are organized in quads and the 70T only has two quads
<azonenberg> as best i can tell the quads share a common clock within themselves (for two tx and two rx pairs)
<azonenberg> sorry, four tx and four rx so the 70T only has one quad
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<kristianpaul> s
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* Fallenou is shooting a 3km long e-mail
<wpwrak> oh dear :)
<mwalle> Fallenou: why do you have to do addi ea, ea, -4
<mwalle> seems a bit strange to me :)
<Fallenou> when the DTLB generates an exception, the instruction causing it is at the "M" stage
<Fallenou> but EA saves the instruction at X stage
<mwalle> so shouldnt the processor set ea right? :)
<wpwrak> is it always +4 ?
<wpwrak> err, -4
<larsc> mwalle: we have the same with for example other exceptions
<larsc> like division by zero
<larsc> so it is only consistent
<Fallenou> well one point of view could be : the exception happens when the instruction X is executing, the M one is already executed
<Fallenou> so it's kind of correct to then jump back to the one which was executing
<Fallenou> but in this case no, it should re-execute the M one
<Fallenou> but it's a re-execution
<mwalle> larsc: mh makes sense, although i guess you dont want to reexecute the instruction causing div by zero again ;)
<larsc> i guess not
<Fallenou> wpwrak: always -4 < good question, you mean if there is a jump or something ?
<Fallenou> I don't know actually
<Fallenou> hummm I'm pretty sure it's always correct
<wpwrak> Fallenou: yup :)
<larsc> can a jump fail with a data error?
<larsc> a dtbl exception
<Fallenou> nop
<Fallenou> jumps are conditional to register values
<Fallenou> (or inconditional)
<Fallenou> wpwrak: that would deserve testing!
<Fallenou> to see if this kind of situation can happen
<mwalle> Fallenou: and do i have to do ea=ea-4 for an itlb miss too?
<Fallenou> mwalle: no because in this case the exception happens at the Fetch stage
<Fallenou> so it happens during some instruction is executing, and we need to resume the execution right to the point where it was
<Fallenou> and it will fetch again the instruction which caused the ITLB miss
<Fallenou> hoping that this time it will be OK :)
<mwalle> what happens if theres an itlb and a dtlb miss?
<Fallenou> I never tested :x
<mwalle> at the same time
<Fallenou> wpwrak already asked this I think
<Fallenou> I really need to do the test
<Fallenou> I write this to the todo :)
<mwalle> i'm currently attending an (online) class for processor design, happens to be that theres just something about exceptions ;)
<Fallenou> oh very cool!
<Fallenou> is it a free online class
<Fallenou> ?
<Fallenou> expensive? open?
<mwalle> coursera.org
<Fallenou> thanks!
<mwalle> i guess thats a 5 stage mips pipeline, which they are discusiing
<larsc> yes
<mwalle> and there the exceptions are delayed until the writeback stage
<mwalle> and then prioritized
<mwalle> iirc, was yesterday evening in bed and i was half asleep ;)
<mwalle> anyway, i have another question for you guys ;)
<mwalle> does gdb support sth like helper functions?
<larsc> you can write plugins in python
<mwalle> eg. i upload some data, and a helper function and then call that function, which does something useful with the data
<mwalle> larsc: yeah but then i can only use the commands the gdbstub supports, right?
<larsc> yes
<mwalle> eg. on lm32 i can only do byte access
<larsc> if you upload extra code I think you can just execute it like normal code
<larsc> e.g. *((*func)(int, int)0x100000)(10, 20)
<mwalle> larsc: and gdb sets a breakpont at the function return point automatically?
<mwalle> or what happens if the functions returns?
<mwalle> mom brb
<larsc> hm good question
<larsc> maybe gdb uses a stub to call the function and has a breakpoint in the stub after the function call
<Fallenou> 21:43 < mwalle> Fallenou: and do i have to do ea=ea-4 for an itlb miss too? < about your question, you were thinking about qemu?
<Fallenou> or just the code of the exception vector ?
<wpwrak> larsc: i concur. i did that sort of thing in umlsim. you may not even need a stub, but having at least a known to be good instruction outside the code path as the return target can't hurt.
<larsc> hm
<larsc> set a breakpoint at some random address and setup your stackframe to have ra point to that address
<larsc> should work i guess
<mwalle> Fallenou: both and consistency ;)
<wpwrak> that would depend on which exception has priority. e.g., if the breakpoint location has an invalid opcode, generates a TLB miss, etc., then you may have several things competing. may get messy to sort them out.
<wpwrak> ah, and if you don't have hw breakpoints, you don't have that problem anyway, since you need to write the trap instruction(s) :)
<mwalle> but i guess nobody acutally knows how the 'call' command in gdb internally works? :)
<larsc> it's magic
<wpwrak> i'd set up the stack frame (you get all the necessary information about argument types and such from the DWARF data), set up the return trap, then preload the necessary registers and let things run
<wpwrak> when you regain control you either get some exception, a breakpoint somewhere inside the call, or the return trap
<wpwrak> in the latter case, you retrieve the return value, do any cleanup needed, and put the return value to good use
<mwalle> ok, but if gdb already supports calling functions, why should i do it by hand? :)
<mwalle> wpwrak: but yes that should be sufficient for a short helper, i dont even need the calling conventions.. i could preload some registers, do sth useful and trap
<mwalle> (saving the registers of course)
<wpwrak> what i mean is: this is how i've done it (successfully) in umlsim and it seems likely that gdb does something similar.
<wpwrak> (umlsim includes what is basically a debugger that can be scripted in a variant of C)
<wpwrak> x86 only, though. i never extended is to amd64. also, the "uml" part of it (User-Mode Linux) stopped working at some point in time. umlsim uses UML to control the kernel's idea of time. so you can, say, have two linux systems run and let them communicate via TCP over a link with a 100 ms delay.
<wpwrak> or run sleep 3600 in a shell and have it return immediately, with "date" before and after showing that an hour has passed
<Fallenou> mwalle: the teachers seem very experienced :)
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<mwalle> Fallenou: yeah and the course is actually about superscalar cpus
<mwalle> wpwrak: (umlsim) nice ;)
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<mwalle> infcall.c seem to do the magic
<mwalle> gn8