ChanServ changed the topic of #nmigen to: nMigen hardware description language · code at · logs at
<awygle> i wish that, nearly a month ago, i had decided to write a packet parser generator thingy, instead of manually writing a half-dozen packet parsing state machines.
<awygle> the idea only occurred to me as possibile... just now
<whitequark> that's what i want to do medium term in nmigen
<whitequark> a packet parser/emitter that is capable of generating PCIe DLLPs/TLPs or TCP/IP
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<_whitenotifier-3> [nmigen/nmigen] whitequark pushed 1 commit to master [+0/-0/±1]
<_whitenotifier-3> [nmigen/nmigen] whitequark bb1bbcc - hdl.mem: fix source location of ReadPort.en.
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<_whitenotifier-3> [nmigen] Failure. 82.69% (+-0.06%) compared to ec8386a -
<_whitenotifier-3> [nmigen] Success. Coverage not affected when comparing ec8386a...bb1bbcc -
<awygle> whitequark: if i assign a 32-bit signal to an 8-bit signal do i get the lower 8 bits, or an error?
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<whitequark> lower 8 bits
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<awygle> cool
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<_whitenotifier-3> [nmigen] The6P4C opened issue #347: DriverConflict raised on entire signal when independently driving individual bits from submodules -
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<Vinalon> Quick question about SPI Flash and Pin resources: when you set a 'PinN' output to '1', does it get pulled low or high?
<Vinalon> The 'cs' pin in SPIFlashResources is a 'PinN', so should it be set to 1 to activate the SPI Flash by pulling the CS pin to ground?