02:56 <cr1901_modern> https://github.com/cr1901/spi_tb/blob/nmigen/nmigen/spi_core.py Well, this only took me about 500,000 years to start doing, but I'm starting to port my formal 101 stuff to nmigen to test it out

02:56 <cr1901_modern> Can only work on it a bit at a time sadly, but it'll at least be a data point for I use formal w/ nmigen

03:18 <_whitenotifier-c> [nmigen/nmigen] whitequark pushed 2 commits to master [+0/-0/±4] https://git.io/JfzgG

03:18 <_whitenotifier-c> [nmigen/nmigen] whitequark 72ef430 - hdl.ast: clarify docs for Value.rotate_{left,right}.

03:18 <_whitenotifier-c> [nmigen/nmigen] whitequark 7ea81f5 - hdl.ast: add const-shift operations.

03:18 <_whitenotifier-c> [nmigen] whitequark closed issue #378: Add shift left/right by constant amount - https://git.io/JfGDc

03:30 <awygle> cr1901_modern: nice!

04:18 <_whitenotifier-c> [nmigen] whitequark commented on issue #73: Expand semantics of Array from MutableSequence to MutableMapping - https://git.io/Jfzaq

04:19 <_whitenotifier-c> [nmigen] whitequark closed issue #73: Expand semantics of Array from MutableSequence to MutableMapping - https://git.io/Jfzam

04:43 <_whitenotifier-c> [nmigen] whitequark commented on issue #373: platform.add_clock_constraint does not work for instances with vivado - https://git.io/JfzwI

04:43 <_whitenotifier-c> [nmigen] whitequark edited a comment on issue #373: platform.add_clock_constraint does not work for instances with vivado - https://git.io/JfzwI

04:59 <_whitenotifier-c> [nmigen/nmigen] whitequark pushed 1 commit to master [+0/-0/±3] https://git.io/Jfzrv

04:59 <_whitenotifier-c> [nmigen/nmigen] whitequark 892cff0 - vendor.xilinx_{7series,ultrascale}: add (*keep*) on constrained clocks.

04:59 <_whitenotifier-c> [nmigen] whitequark closed issue #373: platform.add_clock_constraint does not work for instances with vivado - https://git.io/JfOm5

05:12 <_whitenotifier-c> [nmigen] whitequark commented on issue #373: platform.add_clock_constraint does not work for instances with vivado - https://git.io/Jfzr6

05:35 <_whitenotifier-c> [nmigen/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/JfzoC

05:36 <_whitenotifier-c> [nmigen/nmigen] whitequark 3420b68 - build.plat: skip clock constraints on unused signals.

05:36 <_whitenotifier-c> [nmigen] whitequark closed issue #374: Bad error message when using Signal in add_clock_constraint not actually used in the design - https://git.io/JfOO4

16:48 <agg> upgraded my nmigen and now my code from last year is throwing python recursion errors... what have i done

16:51 <agg> oh, phew, i actually had still got a really old nmigen installed and the latest one works fine

16:52 <hell__> \o/

16:55 <agg> oh, poo, no, i ran the reinstall on the box that already has the working old nmigen, and the new nmigen is still broken for me

16:56 <agg> /o\

16:58 <hell__> /o\

17:01 <agg> ah, I think Elaboratable changed to use ABCMeta as a metaclass, which has broken the horrors I was doing with __getattr__

17:02 <agg> hmm, no, that doesn't quite explain it either.

17:07 <agg> somehow https://github.com/nmigen/nmigen/commit/9fb4a4f09e7488a8462f7fadc6c417cbd531b626 is responsible for making my Elabortable child class break

17:07 <ZirconiumX> Did you git bisect it or something?

17:08 <agg> yes

17:08 <agg> it's so lovely when git bisect works

17:15 <agg> ho ho ho, the culprit https://github.com/adamgreig/daqnet/blob/master/gateware/daqnet/platform.py#L46

17:15 <agg> that's naughty

17:16 <agg> new nmigen tries to set _MustUse__silence, you'd think it would just fall through to the final else:, but before doing that it tries to access self.ports in the elif, which doesn't exist because __init__() hasn't been called yet, so it recurses forever