<d1b2>
<TiltMeSenpai> unless someone has a prebuilt spi controller
<agg>
out of interest, are you adding a new platform to nmigen-boards or writing a platform for your own hardware?
<d1b2>
<TiltMeSenpai> own hardware
<agg>
are you importing SPIResource etc from nmigen-boards?
<d1b2>
<TiltMeSenpai> I doubt enough of these boards will ever exist to justify upstreaming this
<d1b2>
<TiltMeSenpai> yeah
<agg>
aah, I see, ok
<d1b2>
<TiltMeSenpai> I think I'm mostly doing it for the rgb led resource actually
<agg>
maybe when it becomes possible to put instances inside resources you could stick the USRMCLK in there :p
<d1b2>
<TiltMeSenpai> lol, once we have enough ECP5 boards to justify doing this, we could create a dict of all the ecp5 packages and a special ECP5 flash resource (we probably shouldn't actually do this)
<awygle>
i disagree, we should definitely do that lol. or the last bit, at least.
<d1b2>
<TiltMeSenpai> hmm well I guess the ECP5 mclk isn't exactly the only Resource where a pin needs to be accessed through an Instance, is it
<d1b2>
<TiltMeSenpai> I mean generally speaking, aren't serdes(es) a whole thing?
<d1b2>
<TiltMeSenpai> what's the plural of serdes
<vup>
well serdes are supposed to be done transparently using the `xdr` argument (it makes the platform code create the Instance)
<vup>
I guess the question is wether all cases where using an Instance should be covered by the vendor code or wether is should be possible to do it in the board / platform description
<d1b2>
<TiltMeSenpai> hmm, that's an idea. I wonder if the other config modes of the ECP5 would mess with that
<agg>
vup: ah yea that's the issue i mean
<agg>
for clocks perhaps vendor code is ok, like we already have for some boards
<agg>
not sure how vendor could would be able to do the spi clock though
<agg>
and there are other sort of handy things like the ice40 warmboot maybe
<vup>
Well you could have a special name the vendor code recognizes, like the internal oscillator for defaul_clk is done on cyclone v and ice40
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<lsneff>
If I get two read ports from a memory, I should be able to read from two addresses at once, right?
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<d1b2>
<OmniTechnoMancer> I believe that is how it should work, I know I have used xilinx block rams in this way in the past but not with nmigen
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<kbeckmann>
what's the correct way of adding a clock constraint to a net (on e.g. a PLL output), so it can be included in the generated timing constaints file for the toolchain? for external clocks this seems quite easy by just adding Clock(freq) to the Resource() defining the external clock pin.
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<kbeckmann>
for ECP5 it seems that the parameter FREQUENCY_PIN_CLKOP of the EHXPLLL instance magically gets picked up by nextpnr, however it seems i am not able to do something similar to this with the gowin toolchain, and i need to specify it in the .sdc file (clock constraints file).
<anuejn>
platform.add_clock_constraint(signal, frequency) should do that
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<kbeckmann>
thanks! i got stuck in my thinking where i used the ClockSignal() directly. using a wire in between worked around that
<kbeckmann>
i.e. having a separate clkout signal connected to the pll instance, and then doing m.d.comb += ClockDomain(...).eq(clkout)
<vup>
yeah not being able to use ClockSignal in add_clock_constraint is a bit unfortunate, I thought there was an issue about that, but now I cant find one
<_whitenotifier-f>
[nmigen] rroohhh opened issue #542: Using ClockSignal in platform.add_clock_constraint - https://git.io/JkLmp
<kbeckmann>
thanks for opening the issue, i am sure others might stumble upon this
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<_whitenotifier-f>
[nmigen] whitequark commented on issue #542: Using ClockSignal in platform.add_clock_constraint - https://git.io/JkLNZ
<_whitenotifier-f>
[nmigen] whitequark closed issue #542: Using ClockSignal in platform.add_clock_constraint - https://git.io/JkLmp