ChanServ changed the topic of #nmigen to: nMigen hardware description language · code at https://github.com/nmigen · logs at https://freenode.irclog.whitequark.org/nmigen · IRC meetings each Monday at 1800 UTC · next meeting November 2nd
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<_whitenotifier-f> [nmigen] nfbraun edited issue #519: Xilinx Zynq: generated bitstreams do not work with (recent?) FPGA manager - https://git.io/JT7pG
<_whitenotifier-f> [nmigen] nfbraun edited issue #519: Xilinx Zynq: generated bitstreams do not work with (recent?) FPGA Manager - https://git.io/JT7pG
<_whitenotifier-f> [YoWASP/yosys] whitequark pushed 1 commit to develop [+0/-0/±1] https://git.io/JT5eC
<_whitenotifier-f> [YoWASP/yosys] whitequark ba88922 - Update dependencies.
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<_whitenotifier-f> [nmigen] davidlattimore opened issue #520: Invalid HFOSC divider value '0b0' on lattice ICE40 - https://git.io/JT53e
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<_whitenotifier-f> [nmigen] whitequark commented on issue #519: Xilinx Zynq: generated bitstreams do not work with (recent?) FPGA Manager - https://git.io/JT5cC
<_whitenotifier-f> [nmigen] whitequark commented on issue #520: Invalid HFOSC divider value '0b0' on lattice ICE40 - https://git.io/JT5cE
<_whitenotifier-f> [nmigen] davidlattimore opened pull request #521: Lattice ICE40: Zero-pad CLKHF_DIV - https://git.io/JT5CN
<_whitenotifier-f> [nmigen] codecov[bot] commented on pull request #521: Lattice ICE40: Zero-pad CLKHF_DIV - https://git.io/JT5WU
<_whitenotifier-f> [nmigen] codecov[bot] edited a comment on pull request #521: Lattice ICE40: Zero-pad CLKHF_DIV - https://git.io/JT5WU
<_whitenotifier-f> [nmigen] codecov[bot] edited a comment on pull request #521: Lattice ICE40: Zero-pad CLKHF_DIV - https://git.io/JT5WU
<_whitenotifier-f> [nmigen] codecov[bot] edited a comment on pull request #521: Lattice ICE40: Zero-pad CLKHF_DIV - https://git.io/JT5WU
<_whitenotifier-f> [nmigen] whitequark closed issue #520: Invalid HFOSC divider value '0b0' on lattice ICE40 - https://git.io/JT53e
<_whitenotifier-f> [nmigen/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/JT5WW
<_whitenotifier-f> [nmigen/nmigen] davidlattimore 781a3aa - vendor.lattice_ice40: zero-pad CLKHF_DIV in SB_HFOSC instance.
<_whitenotifier-f> [nmigen] whitequark closed pull request #521: Lattice ICE40: Zero-pad CLKHF_DIV - https://git.io/JT5CN
<_whitenotifier-f> [nmigen] whitequark commented on pull request #521: Lattice ICE40: Zero-pad CLKHF_DIV - https://git.io/JT5Wl
<_whitenotifier-f> [nmigen/nmigen] github-actions[bot] pushed 1 commit to gh-pages [+0/-0/±13] https://git.io/JT5W4
<_whitenotifier-f> [nmigen/nmigen] whitequark cd3e65d - Deploying to gh-pages from @ 781a3aa76776532657d79ea195a1ac28f18b23d6 🚀
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<_whitenotifier-f> [nmigen] korken89 opened issue #522: Sync simulation without defining a clock period runs forever - https://git.io/JT5hL
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<_whitenotifier-f> [nmigen] whitequark commented on issue #522: Sync simulation without defining a clock period runs forever - https://git.io/JTdUW
<_whitenotifier-f> [nmigen] whitequark closed issue #522: Sync simulation without defining a clock period runs forever - https://git.io/JT5hL
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<_whitenotifier-f> [nmigen] korken89 commented on issue #522: Sync simulation without defining a clock period runs forever - https://git.io/JTd4f
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<Yatekii> o/
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<_whitenotifier-f> [nmigen] nfbraun opened pull request #523: vendor.xilinx_7series: byte swap generated bitstream - https://git.io/JTd9t
<_whitenotifier-f> [nmigen] codecov[bot] commented on pull request #523: vendor.xilinx_7series: byte swap generated bitstream - https://git.io/JTd9E
<_whitenotifier-f> [nmigen] codecov[bot] edited a comment on pull request #523: vendor.xilinx_7series: byte swap generated bitstream - https://git.io/JTd9E
<_whitenotifier-f> [nmigen] codecov[bot] edited a comment on pull request #523: vendor.xilinx_7series: byte swap generated bitstream - https://git.io/JTd9E
<anuejn> whitequark: no I am not waiting for you with #512
<anuejn> sorry for being slow, was otherwise occupied
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