ChanServ changed the topic of #nmigen to: nMigen hardware description language · code at https://github.com/nmigen · logs at https://freenode.irclog.whitequark.org/nmigen · IRC meetings each Monday at 1800 UTC · next meeting September 14th
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<_whitenotifier-f> [YoWASP/nextpnr] whitequark pushed 1 commit to develop [+0/-0/±1] https://git.io/JU9al
<_whitenotifier-f> [YoWASP/nextpnr] whitequark e1f8e3a - Update dependencies.
<_whitenotifier-f> [YoWASP/yosys] whitequark pushed 1 commit to develop [+0/-0/±1] https://git.io/JU9wG
<_whitenotifier-f> [YoWASP/yosys] whitequark 8e0ed62 - Update dependencies.
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<_whitenotifier-f> [nmigen-boards] H-S-S-11 opened pull request #115: Add DE4 support - https://git.io/JU9XF
<_whitenotifier-f> [nmigen-boards] H-S-S-11 edited pull request #115: Add DE4 support - https://git.io/JU9XF
<_whitenotifier-f> [nmigen-boards] H-S-S-11 edited pull request #115: Add DE4 support - https://git.io/JU9XF
<_whitenotifier-f> [nmigen] whitequark commented on issue #439: fsm_state changes mid cycle - https://git.io/JU9Mv
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<agg> is there a way to get the current timestep from a Simulator? ideally in clock cycles, but nanoseconds would work
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<whitequark> timestep?
<agg> I think what I want is simulator._engine.now when using pysim
<agg> but basically I want to know how many times yield has been called
<agg> (without otherwise keeping track of it myself, since i'm using a bunch of subgenerators etc)
<whitequark> ah, there's an open issue
<whitequark> you could also do it in a different way, launch a concurrent process that does nothing but counts yield
<whitequark> and use a nonlocal
<agg> that would work, thanks! missed the existing issue
<whitequark> i would somewhat prefer the approach with the concurrent process
<whitequark> since it doesn't depend on the clock generator in any way, and its semantics is exactly what you actually want
<agg> when you say concurrent process, are you thinking of another call to add_sync_process, or a wrapper around my testbench?
<whitequark> honestly, either would work. i think a wrapper might be slightly cleaner in a few ways
<whitequark> we could probably recommend the wrapper in docs at some point
<agg> hmm, I was expecting `def wrapper(): for tick in testbench(): yield tick` to transparently wrap the testbench, but no joy
<agg> (I think when the testbench tries to yield from the simulator it doesn't go through; using `yield from testbench()` in the wrapper works but then I can't count the ticks
<whitequark> hmm
<whitequark> i think you have to call the testbench with the result of `yield tick`
<agg> hmm, `def wrapper(): tb = testbench(); for tick in tb: tb.send((yield tick))` seems closer
<agg> but my tests fail
<whitequark> drop the for
<whitequark> result = None; while True: result = tb.send((yield result))
<whitequark> something like this, i think
<agg> that seems to work
<agg> (plus catching the StopIteration etc)
<agg> guess the for loop was double-pumping the tb
<agg> need to be a bit cleverer to count clock ticks though
<agg> if result is None that's a tick, but the tb could also yield Tick etc, right?
<agg> as it stands it seems to count both the `yield` and the `data = (yield from module.data)` yields
<whitequark> yes and yes
<whitequark> the interface kinda sucks
<agg> conveniently I don't understand the clock stuff and just use `yield` to advance whole cycles, so i can count those very easily and it now all works
<whitequark> yes, that should be fine for most purposes
<whitequark> you're not *really* supposed to yield with an argument from sync processes
<lkcl> whitequark: is this for simulation? we use that trick to create multiple processes which are slightly different
<lkcl> line 224
<lkcl> https://git.libre-soc.org/?p=nmutil.git;a=blob;f=src/nmutil/test/test_inout_mux_pipe.py;hb=HEAD#l224
<lkcl> rather than be forced to have add_sync_process(dut.test_rcv1)
<lkcl> add.... test_rcv2
<lkcl> add.... test_rcv3
<lkcl> etc. etc.
<lkcl> for i in range(4): add_sync_process(dut.test_rcv(i))
<lkcl> then we can alter the number of simulation processes depending on the number of Pipeline Reservation Stations to be tested.
<lkcl> it sounds, "oh yeah that's dumb, of course if you can test with 4 you can test with 5,6,7 or 8, why bother?"
<lkcl> to which the answer is: the "mask" for the ReservationStations could have been accidentally set up incorrectly, especially with a non-power-of-2 number of Reservation Stations
<lkcl> and if the mask (destination) is wrong (2 bits for a destination ID between 0 and 6 for example) that's a bug
<whitequark> uh, i don't think it's dumb
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