<gatecat>
probably it for today, tomorrow I am going to look at the bel stuff (which is currently in an inbetween state), but a review of the current wire and pip stuff as well as the mistral changes would be appreciated
<gatecat>
Sarayan:/Lofty: (sorry, forgot to poke you about earlier update) - one more question about routing; some IO seem to route through the memory controller (I see things like `HMC.025.000:IOINTDQDIN.65 GPIO.089.004.2:DATAIN.0` in the route output sometimes on Quartus bitstreams). Is there any data in mistral that maps a pin to IOINTDQDIN.65 (I guess this is HMC DQ65), for example?
<gatecat>
the pin in question seems to be AH16, of the 5CSEBA6U23I7 device
<Sarayan>
not yet, and I don't have the data yet either
<Sarayan>
I have some idea of how I could get to it, but I'm not entirely sure
<gatecat>
I guess a bruteforce script could just try every pin and see what happens
<Sarayan>
Sure, but that's a lot of them. Probably way easier to extract them from the quartus routing table :-)
<gatecat>
mmm
<Sarayan>
more reliable too
<gatecat>
it'd definitely be useful to have this kind of "routing but not bitstream-related" info in mistral in a consistent way (similar to the clock mux sources)