Lofty changed the topic of #prjmistral to: Project Mistral: Yosys (and hopefully nextpnr) on Cyclone FPGAs - https://github.com/ZirconiumX/mistral - logs: https://freenode.irclog.whitequark.org/prjmistral
<gatecat> Sarayan: do we know where the GOUT inversions in an empty bitstream come from? is this something that will just need to be hardcoded in nextpnr for now (most of the other defaults in an empty bitstream are fairly self-apparent)
<gatecat> stuff like `i GOUT.000.012.0069 1`
<JJJollyjim> apparently it’s when too much uric acid crystallises and deposits in the joints
<gatecat> lol
<gatecat> it seems like even though all these inverters have a 'default value' in the database, that's not always the actual default value in the empty bitstream; even if there's no logical reason for that
<gatecat> nvm, seems like I misunderstood how this works - they are dumped for all cases without a pnode even if they match their default value
<gatecat> it's a much smaller and more manageable set that don't match their default
<Sarayan> gatecat: I haven't yet been able to establish the defaults for them
<Sarayan> that's why they're all dumped
<Sarayan> tbh there's probably a number of missing inverters in the schematics I'm doing
<Sarayan> If I now have all the p2r (I think I do) it may now be possible to establish the actual defaults in fact
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