azonenberg changed the topic of #scopehal to: libscopehal, libscopeprotocols, and glscopeclient development and testing | https://github.com/azonenberg/scopehal-cmake, https://github.com/azonenberg/scopehal-apps, https://github.com/azonenberg/scopehal | Logs: https://freenode.irclog.whitequark.org/scopehal
<azonenberg> Degi: ADCLK905 as buffer?
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<azonenberg> 800mV per leg, 1600 mV differential. so should be plenty of swing for the buffers
<azonenberg> actually ADCMP607 looks better
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<azonenberg> degi, electronic_eel: thoughts on using an 1U server power supply?
<azonenberg> we could get our 5V, 3.3V, and 12V rails all from that
<azonenberg> would simplify the psu a fair bit
<azonenberg> in fact we could even get our -5V rail
<azonenberg> and they're mains powered/earthed
<azonenberg> looking at one in particular on newegg, the athena power AP-MFATX22P, $43.99
<azonenberg> 3.3V 12A min 0.3A, our OCXO alone needs 300 mA so we'll have no problem hitting that, and our 2.67A calculated max current is well below the 12A max
<azonenberg> 5V 12A min 500 mA, we only need 50 mA on the 5V rail but if we regulate one of the lower rails, say the 1V 7A rail, off of that we should have no problem hitting the minimum load
<azonenberg> then it has two 12V rails which are each 12A max, 0.3A min
<azonenberg> again if we regulate some of the other rails from 12 we'll have no problem hitting the min
<azonenberg> then -5V at 0.5A is plenty for the input comparators, we probably don't need +5VSB but we can regulate the Vbat rail off that to keep the supercap charged or something
<azonenberg> and make the rtc tick
<azonenberg> monochroma, lain: any inputs from your end on this?
<azonenberg> right now my spreadsheet says the actual max rail requirements, before adding safety margins, are
<azonenberg> 1V0 7.06A
<azonenberg> 1V5 5.1A
<azonenberg> 2V5 0.76A
<azonenberg> 1V2 0.93A
<azonenberg> 2V0 0.25A
<azonenberg> 1V8 0.61A
<azonenberg> 5V0 0.05A
<azonenberg> 3V3 2.67A
<azonenberg> 5V0N 0.05A
<azonenberg> 12V0 3.68A
<azonenberg> 19V2 0.04A
<azonenberg> we'd need to also estimate minimum loads with the fpga blank, no qsfp installed, etc to make sure we hit the min load for the supply, but this would greatly simplify the PSU design
<azonenberg> A 1u server supply would fit right next to our main board and almost perfectly fill the case
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<azonenberg> the alternative factor to consider is that the 3.3V rail likely isnt stable enough for a PLL, and the 5V is probably not clean enough to run comparators off
<azonenberg> So it might not simplify the design as much as it would appear
<azonenberg> also i derped and forgot to put any kind of EMI filter on the MEAD power connection. Will fix that in the next batch of boards (I only ordered three PCBs, and will probably only assemble one)
<azonenberg> So we might have conducted/radiated leakage on the power input
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<_whitenotifier-f> [starshipraider] azonenberg pushed 1 commit to master [+1/-0/±16] https://git.io/JfFbN
<_whitenotifier-f> [starshipraider] azonenberg 9bcedf6 - 12V power supply etc
<azonenberg> Starting work on the MAXWELL power supply. Making heavy use of commodity 1/8 brick or similar sized DC-DC modules for the higher current rails
<azonenberg> it may add a bit to the cost compared to using a discrete smps controller, but it's also easy and simplifies assembly. Which IMO is important for a board of this size
<azonenberg> Also planning on having all of the rails sequenced by the STM32 except for a 3.3V standby rail, which will run the STM32
<_whitenotifier-f> [starshipraider] azonenberg pushed 1 commit to master [+1/-0/±17] https://git.io/JfFpM
<_whitenotifier-f> [starshipraider] azonenberg 85c5f5c - Added preliminary power design for 1.0 and 1.5V rails. Began split of 1.0V rail into two sub-rails, one for SERDES and one for FPGA core
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<Famine-> azonenberg, no clue on the price but you could try getting a quote from TDK, i know they do fully configurable supplies with 8-12 outputs
<azonenberg> yeeeah no
<azonenberg> i'm not made of that kind of money
<azonenberg> more importantly this is an open hardware project
<azonenberg> REAL open hardware, not like raspberry pi type stuff that you can't actually get the parts to DIY
<lain> raspi don't even publish the full schematics
<azonenberg> well that too
<azonenberg> But i want to only use parts that are in active production and easily available from distributors
<lain> and the thing can't even boot without a blob, because it's brought up by the VideoCore, not the ARM
<lain> but I digress
<azonenberg> lain: btw what do you think of the wip psu design?
* lain looks
<azonenberg> 48V DC (negative earth) in from external supply, chassis bonded to negative supply rail aka earth
<azonenberg> fuse and emi filter, then an eighth brick dc-dc to step that down to 12
<azonenberg> the brick is enabled/disabled by a rear panel hard power switch
<azonenberg> then coming off the always-normally-on 12V rail is going to be an always-on 3.3V rail to run the MCU and front panel display
<azonenberg> this will be used to provide soft power on/off of the FPGAs and other stuff, with the MCU running the rail sequencing
<azonenberg> So if we have a failure on one of the big rails the MCU can print a nice "1.8V rail overcurrent fault" message on the display
<azonenberg> the mcu rail is separate from the 3.3v rail that runs the pll, ocxo, and other stuff
<azonenberg> also i split the 1.0V rail to have one for gtx and one for fpga core
<azonenberg> the dcdc has a good noise spec that should be ok for the gtx, but i wasnt sure if hte fpga core would ruin that
<azonenberg> so i split the rail
<azonenberg> (then still put my own pi filter after the dcdc to be safe)
<azonenberg> I'm using entirely premade dcdc supplies, not custom smps layout. I wanted something pre-engineered just because of the scale of the project
<lain> yeah that all sounds reasonable
<azonenberg> not prepared to waste a $400 fpga on a $1K+ board because of excessive noise from me doing something silly
<lain> I like the linear tech uModules
<azonenberg> Also because there are so many rails it would take forever to design :p
<lain> yeah
<azonenberg> And sure it will cost a bit more
<azonenberg> but honestly, $50 extra bom cost or so on a >$1K system with $3K of active probes?
<azonenberg> it's the least of my worries
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<azonenberg> woop, new probe boards are received from oshpark and shipping out
<azonenberg> here's hoping this is the one
<electronic_eel> azonenberg: from what I understand about the pc industry, they are moving slowly away from all the different rails generated in the psu
<azonenberg> Yes, everything is regulated off of 12V
<electronic_eel> the pc industry moves towards having the psu just supply 12v and the rest being created on the mainboard
<monochroma> yeah there is a new ATX standard proposed that is 12V only
<azonenberg> i was about to say
<azonenberg> i'm surprised that doesnt exist yet
<azonenberg> what will that do to HDDs?
<azonenberg> do modern drives use anything but 12v on the sata connector?
<electronic_eel> they will die out?
<azonenberg> it supplies 3.3 and 5, not even sure if there's a 12 rail on there
<monochroma> azonenberg: modern sata uses the 5v usually
<azonenberg> So 5 is the intermediate rail and there's no 3.3
<electronic_eel> they could also run off 12v only and do local regulation for the rest
<azonenberg> electronic_eel: well what i meant specifically was, there is no 12v rail on the standard sata power connector
<azonenberg> So it wouldnt just be a breaking change for motherboards
<electronic_eel> the 3v3 connector on sata was never really used
<monochroma> azonenberg: 3.3 was officially phased out, and the pins /REUSED/ for a hardware reset line in SATA
<azonenberg> no but there is no 12v, you would need 5V somewhere
<azonenberg> or a new sata power connector that was only +12V
<electronic_eel> no 12v? no, they have 12v on the sata power
<azonenberg> they do? i swear it's 5 and 3.3 only
<azonenberg> let me check
<electronic_eel> no, 12v, 5v, 3v3 was the original spec
<monochroma> its 12, 5, and 3.3/hwreset
<azonenberg> ah, ok
<electronic_eel> but 3v3 was never really used by disks
<azonenberg> So you can just remove 5V from the next spec version
<azonenberg> Idea: unify pc power to use a single, identically keyed molex mini-fit jr
<azonenberg> say the pcie 8 pin since that won't break existing pcie cards
<azonenberg> then you just have N of these on a power supply
<azonenberg> mobo could take 1-2, one per drive, one per big pcie card, etc
<azonenberg> and then have an extended 10 pin version used for the mobo that has the on/off contact
<electronic_eel> also standby
<azonenberg> like i said ten pins
<electronic_eel> so since the pc industry is moving to just 12v, I would do something similar for MAXWELL and not rely on server psus
<electronic_eel> if you want to save money, maybe take a look at changing the 48v to 12v converter
<azonenberg> so one option is to switch to the 12V version of my 48V supply
<electronic_eel> that would be another option
<azonenberg> and take 12V on the same connector directly, skipping that conversion
<azonenberg> But that means you lose the wide input range capability
<azonenberg> with this converter we can do like 18 to 70V input
<monochroma> 24V is more common in industrial supplies
<azonenberg> So we allow 24 or 48 or anything in between
<azonenberg> heck, an unregulated string of SLAs would work :p
<electronic_eel> is a LA something you would use in the field where flexible power solutions matter?
<azonenberg> well this is a rackmount LA with 96 channels, not like a saleae :p
<azonenberg> it's more it gives you flexibility to fit into what your lab has available if there's an existing DC bus
<electronic_eel> I'm not sure if that really matters for a lab setup, you'll always have tons of wallwarts and power bricks there
<azonenberg> true
<azonenberg> in any case whatever happens before the 12V rail is easy to change until the very last minute
<azonenberg> it's settled we're not using an atx supply and doing everything with COTS dcdc bricks off of a 12V intermediate rail
<electronic_eel> did you see the latest signal path video with the signal hound spectrum analyzer?
<azonenberg> Yes
<electronic_eel> that is something that would also be used in the field
<azonenberg> I linked it here
<electronic_eel> there having a flexible power supply solution really matters
<azonenberg> But what i also noticed about that, though, is that it was 10GbE connected and streamed data
<azonenberg> that's the first piece of test equipment i've seen built like that
<azonenberg> and it gives me hope that my idea isn't stupid :p
<monochroma> USRPs have been doing that
<azonenberg> i've only seen usb3
<electronic_eel> yeah, something that fits right into your planned line of instruments
<azonenberg> exactly
<azonenberg> not that i planned to do a specan any time soon
<azonenberg> but now it looks like i wont have to :p
<monochroma> USRPs have mostly been gigE (and iirc 10gige)
<azonenberg> in fact, i want to buy one of those lol
<azonenberg> they're shockingly affordable
<azonenberg> like, around $15K ish
<azonenberg> i was expecting six figures
<azonenberg> i dont need it enough to justify buying one instead of the 4 GHz scope i'm saving up for
<azonenberg> but it's very much on the future lab toy list
<electronic_eel> yeah, and buying not now but when you need it also gives you the more current model with more features then
<electronic_eel> as you saw in the video they improved the digital board over several generations
<electronic_eel> the first was just usb3 and no internal ram
<electronic_eel> then came internal ram and the 10g ethernet is just the latest model
<azonenberg> Yeah
<electronic_eel> next model will have more bandwidth and 40g ;)
<azonenberg> Right now my upgrade list is the 4 GHz scope nearish term, then in no particular order...
<electronic_eel> nonono, pnp first
<azonenberg> replacing the picovna with something less awful, and with >6 GHz of bandwidth
<azonenberg> a specan
<azonenberg> and a higher bandwidth scope, 8-12 GHz class
<azonenberg> also getting sonnet gold or pro
<electronic_eel> or do you not count the pnp as lab equipment?
<azonenberg> the pnp isnt test equpment but is also on the nearish term list, will probably happen after the scope though, if things go well at my performance review for work the scope is only a few weeks out
<azonenberg> the pnp will also come from china with slow shipping i imagine, it's not gonna be in an epacket
<azonenberg> probably on a boat
<azonenberg> So i fully expect once i've finished the MAXWELL layout - probably a month or so of work given how huge it will be
<azonenberg> then i'll order the boards, wait longer for those to come back
<azonenberg> i'll have time to kill
<azonenberg> also i can spend some time working on BLONDEL, the MEAD bringup, finishing the tcp retransmit logic
<electronic_eel> don't they ship it with air mail? shippng pallets in a sea container is really slow and all the shipping customs form stuff really awful
<azonenberg> there's a lot of stuff i can do before the pnp really is a bottleneck
<azonenberg> well there's going to be customs regardless and i imagine air mailing a 60 kilo crate a meter on a side is going to be super expensive
<electronic_eel> air mail customs with a carrier like dhl or fedex is peanuts compared to customs for a sea container
<azonenberg> if they give me the choice i'm telling them to put it on a boat :p
<azonenberg> i imagine there are carriers that do this sort of stuff
<azonenberg> doesn't international ups ground ship by sea?
<azonenberg> i've never looked into international shipping of large goods
<electronic_eel> the problem seems to be a container that is not full of stuff for one recipient, that is not common
<azonenberg> don't shipping couriers do that all the time?
<electronic_eel> one container for one recipient is common
<azonenberg> its just like an airplane
<azonenberg> unload, figure out which stuff gets on which truck
<azonenberg> take it to a warehouse, customs looks at each package
<electronic_eel> smaller stuff is more often sent by air mail
<electronic_eel> I don't know why it is like that, it is just what I have seen how it is done and where the problems are
<electronic_eel> I'm not too deep into this