08:48 <sf-slack2> <acomodi> mithro: I have commented PR https://github.com/SymbiFlow/symbiflow-arch-defs/pull/775. `<tile>` tags appear in XMLs (only xc7-related), but they are "invisible" to VtR

08:48 <tpb> Title: Sign in to GitHub · GitHub (at github.com)

08:49 <sf-slack2> <acomodi> mithro: more details are in the comment on GH

14:11 <mithro> acomodi: Okay great

14:12 <mithro> mkurc: Where are we with the Yosys attribute + parameter stuff?

14:16 <sf-slack2> <mkurc> @mithro I fixed handling of default values of floating point (aka real) parameters

14:17 <sf-slack2> <mkurc> So if there are no more review issues then it is ready on my side.

14:17 <mithro> mkurc: Okay I'll take a look shortly

14:38 <sf-slack2> <mkurc> @mithro @litghost Have you managed to successfully model an async set/reset flip-flop (eg. FDSE) with timings ? I've been trying to make such a test for V2X SDF import with no success.

14:39 <sf-slack2> <mkurc> I tried to use the exact example as given in the VPR doc (https://docs.verilogtorouting.org/en/latest/tutorials/arch/timing_modeling), this time no async reset and the VPR segfaults with it.

14:39 <mithro> mkurc: Example?

14:40 <mithro> FYI it is a public holiday here in the US so litghost probably won't be around today...

14:40 <sf-slack2> <mkurc> Ahh, ok.

14:40 <sf-slack2> <mkurc> I can prepare a short doc with explanations / examples

14:42 <mithro> mkurc: That shouldn't be needed, just an example pasted here would be enough

14:43 <sf-slack2> <mkurc> @mithro The example is there https://docs.verilogtorouting.org/en/latest/tutorials/arch/timing_modeling/ under the "Sequential block (no internal paths)" section.

14:45 <sf-slack2> <mkurc> @mithro The first problem is that when such a model+pb_type is injected into the v2x test suite then the VPR crashes (segfaults) with the assertion failure: `vpr/src/timing/timing_graph_builder.cpp:250 add_block_to_timing_graph: Assertion 'clk_port' failed.`

14:46 <sf-slack2> <mkurc> @mitrho But this is just a D flip-flop

14:46 <mithro> mkurc: I saw that issue recently

14:47 <mithro> mkurc: Let me find the fix

14:47 <sf-slack2> <mkurc> @mitrho: Ok

14:48 <sf-slack2> <mkurc> @mitrho And another thing: when having a FF with async set/reset like FDSE then I see no way to define timing between SR and Q.

14:49 <mithro> mkurc: It is caused by the eblif not having the clock pin

14:52 <mithro> mkurc: https://github.com/SymbiFlow/symbiflow-arch-defs/pull/703/commits/5b0105bdc55f5d5acb9235252cc248c597b4f6b7 that is the commit you need I think

14:52 <tpb> Title: mux_gen + v2x: Support generating FASM annotations for muxes. by mithro · Pull Request #703 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)

14:52 <mithro> mkurc: I'll pull it out into it's own pull request

14:52 <litghost> Fdse is syncronous reset

14:52 <litghost> Fdce/fdpe is async reset

14:53 <litghost> In sync case, it is clock to q timing, and setup/hold on sr

14:54 <litghost> In async it recovery+removal on sr

14:54 <litghost> https://github.com/SymbiFlow/prjxray-db/blob/master/artix7/timings/CLBLL_L.sdf#L255

14:54 <tpb> Title: prjxray-db/CLBLL_L.sdf at master · SymbiFlow/prjxray-db · GitHub (at github.com)

15:18 <mithro> mkurc: https://github.com/SymbiFlow/symbiflow-arch-defs/pull/783

15:18 <tpb> Title: Small improvements to eblif generation by mithro · Pull Request #783 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)

15:19 <sf-slack2> <mkurc> @mitrho Thanks. And yes, I meant FDCE for async reset.

17:50 <mithro> mkurc: I added a bunch of tests into that pull request -> https://github.com/SymbiFlow/symbiflow-arch-defs/pull/783

17:50 <tpb> Title: Small improvements to EBLIF generation by mithro · Pull Request #783 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)

18:37 <mithro> kgugala: What is the status of https://github.com/SymbiFlow/symbiflow-arch-defs/pull/756?

18:37 <tpb> Title: [DNM][WIP] Use Yosys to generate blif in v2x tests by kgugala · Pull Request #756 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com)

18:45 <mithro> litghost / acomodi: kmurry just landed the reformatting patch to vtr

19:12 <sf-slack2> <acomodi> mithro: that's great! We need to merge it to the symbiflow fork ASAP. There already is a PR open with a merge from upstream, but currently it is failing during routing. I am looking at the issue. More information in the PR itself: https://github.com/SymbiFlow/vtr-verilog-to-routing/pull/59

19:12 <tpb> Title: Merge upstream by acomodi · Pull Request #59 · SymbiFlow/vtr-verilog-to-routing · GitHub (at github.com)

19:49 <mithro> acomodi: It looks like xc7 is failing on master at the moment?

19:50 <mithro> acomodi: Nope, I'm work sorry...