<litghost>
The fixed fuzzer is more general anyways, so it was a good fix overall
<litghost>
daveshah: Is nextpnr-xilinx running with timing data yet? We ran into a bug in the timing model that is worth mentioning if so
<daveshah>
It is using parts of the xray timing data, but it is an approximation rather than a particularly proper model
<daveshah>
Would be worth knowing the bug for when I do a proper model though
<litghost>
The LV (long vertical wires) pips had previously has 0 delay, which made vertical wires look really cheap
<litghost>
For now we've copied the driver data from the LH (long horiz wires) which looks to be a good approximation, plus or minus the fact that some of the LV wire RC delay appears to be lumped into the delay constants
<litghost>
This works reasonable enough, good to about ~2-4%
<litghost>
Significantly better than LV wires being free
<daveshah>
Haha, that is almost part of the approximations in the nextpnr timing model anyway I think
<litghost>
Ok
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<daveshah>
I need to do some proper comparisons at some point anyway (I want to compare against the new timing model in RapidWright too)
<litghost>
To be clear though, the RapidWright timing model is still an approximation of the Vivado timing model?
<daveshah>
Yes, although quite a different approximation by the looks of things
<litghost>
The arch-defs 7-series VPR timing model approximation is typically within <1% of the Vivado, expect when tl_buffer's are involved
<litghost>
It just happens to be that tl_buffers are used for LV wires, which I missed when I did the first comparisions
<litghost>
If you happen to figure out a better approximation for the pips that use the tl_buffer switch model, do tell
<litghost>
:)
<daveshah>
Ack, I was just looking at how Xray extracts the timing info the other day actually. Might try something like this for UltraScale to compare against RapidWright, too
<litghost>
Let us know how it goes
<litghost>
With prjuray starting up soon, the version of the 074 fuzzer will need that insight
<litghost>
I'm crossing my finger the most of the work done on the arch-defs 7-series timing model will apply directly to the US model
<litghost>
Save a lot of grief
<_whitenotifier-3>
[symbiflow-arch-defs] litghost opened issue #1326: LV timing model workaround - https://git.io/JvRke
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<ssb>
litghost, thanks! Will after vacation
<_whitenotifier-3>
[symbiflow-arch-defs] litghost opened issue #1328: Poor BUFH placement from VPR - https://git.io/JvRIl
<_whitenotifier-3>
[conda-packages] mithro opened issue #75: Convert conda-tag-filter.sh into a conda-build-prepare Python script - https://git.io/JvRqs
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<_whitenotifier-3>
[symbiflow-arch-defs] litghost opened issue #1329: Integrate vivado timing analysis parser to xc7 vendor CI - https://git.io/JvROl
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