05:08 <_whitenotifier-3> [fpga-tool-perf] mithro opened issue #42: Set up Kokoro to run actually run the tests - https://git.io/JvzTt

05:09 <_whitenotifier-3> [fpga-tool-perf] mithro opened issue #43: Add Ibex as a test - https://git.io/JvzTY

05:10 <_whitenotifier-3> [fpga-tool-perf] mithro opened issue #44: Add OpenTitan as a test - https://git.io/JvzTO

05:11 <_whitenotifier-3> [fpga-tool-perf] mithro opened issue #45: Add NeTV2 PCIe video example as test design - https://git.io/JvzT3

05:14 <_whitenotifier-3> [fpga-tool-perf] mithro opened issue #46: Add NeTV2 default hardware design as example - https://git.io/JvzTC

05:18 <_whitenotifier-3> [fpga-tool-perf] mithro opened issue #47: Add hamsternz's HDMI example - https://git.io/JvzT8

05:18 <_whitenotifier-3> [fpga-tool-perf] mithro opened issue #48: Add the Daisho USB3.0 example from Enjoy-Digital - https://git.io/JvzT4

05:19 <_whitenotifier-3> [fpga-tool-perf] mithro opened issue #49: Add hamsternz's DisplayPort core example - https://git.io/JvzTB

08:00 <detoxo_16> hello i'm arjun and I also want to contribute for this organization

08:02 <ZirconiumX> I think mithro is asleep at present, but I can offer suggestions

08:03 <detoxo_16> okay

08:04 <ZirconiumX> How much do you know about FPGA architecture?

08:05 <detoxo_16> FPGA is in our college curriculum so i'm studying that along with verlog using xlinix

08:12 <detoxo_16> so along with the curriculum I'm also working on the IEEE research paper whose motive is to design an FPGA Based Fully Synchronized Design of a Bilateral Filter for Real time Image Denoising

08:52 <ZirconiumX> They quit, but that's not the kind of thing that happens here

10:08 <_whitenotifier-3> [symbiflow-arch-defs] acomodi opened issue #1351: Complex design take long time to run through fasm2bels - https://git.io/Jvzmj

15:25 <sf-slack> <kgugala> @litghost @mithro how do we want to report the frequency in perf tool? e.g. for Litex Linux test I get the following data:

15:25 <sf-slack> <kgugala> Max delay for group: soc_pll_clk200 is 3.035ns Max delay for group: eth_rx_clk is 31.630ns Max delay for group: eth_tx_clk is 29.992ns Max delay for group: sys_clk is 4.642ns Max delay for group: soc_pll_clk200 is 4.392ns Max delay for group: eth_rx_clk is 2.464ns Max delay for group: eth_tx_clk is 2.464ns Max delay for group: sys_clk is 2.335ns

15:25 <sf-slack> <kgugala> shall I simply grab the max freq and report it?

15:34 <litghost> kgugala: frequency in MHz, but also include critical path delay

15:35 <litghost> kgugala: Also worst setup/hold slack violation (0 if none) and total (e.g. sum) setup/hold slack violation (0 if none)

15:35 <sf-slack> <kgugala> Ok

15:35 <litghost> kgugala: This will allow us to track progress on design that don't meet timing

15:36 <litghost> kgugala: But if the totals are < 1 ns that is different from totals that are >10 ns

16:06 <sf-slack> <kgugala> mhm

16:11 <_whitenotifier-3> [symbiflow-arch-defs] litghost opened issue #1352: Clock propagation story - https://git.io/Jvz8G

16:26 <mithro> kgugala: min, max, average, stddev, number of runs

16:27 <mithro> kgugala: pass / fail and "margin" for when we have an SDC file

20:55 <sf-slack> <kgugala> @mithro @litghost @acomodi https://github.com/SymbiFlow/fpga-tool-perf/pull/50

20:55 <tpb> Title: Timing info by kgugala · Pull Request #50 · SymbiFlow/fpga-tool-perf · GitHub (at github.com)

20:56 <sf-slack> <kgugala> not all the required info, but sth we can start with

20:56 <sf-slack> <kgugala> I'll continue extracting the rest of the timing data