17:33 <_whitenotifier-b> [sv-tests] hzeller opened issue #952: Ibex: missing file ? - https://git.io/JJWli

18:04 <mithro> az0re: Sounds like you are asking about Yosys? I would suggest the #yosys IRC channel

18:14 <az0re> Yup

18:15 <az0re> Sorry for the spam

18:15 <az0re> It is actually working now

18:30 <mithro> az0re: Yosys is an external project that SymbiFlow uses in the same way that the Linux kernel is an independent project that the Debian distribution uses

18:46 <_whitenotifier-b> [symbiflow-arch-defs] litghost opened issue #1607: Intermittent VTR failure that looks like memory corruption - https://git.io/JJWBA

20:23 <_whitenotifier-b> [sphinx_symbiflow_theme] mithro opened issue #30: Adding a way to display the license for the documentation at the bottom of the page - https://git.io/JJWE7

21:08 <andrewb1999> @litghost do you know the correct output of the bram_test for xc7 is?

21:08 <litghost> andrewb1999: Sorry, what's the context here?

21:12 <andrewb1999> litghost: For one of the benchmarks I want to run, we use a bram with shared address and data lines which will not map to brams correctly now. We have a patch that we think should work but we want to create a small test case for it. I think I can just modify the xc7/tests/bram_test/ examples to test this, but I want to know what the correct output should be first.

21:12 <andrewb1999> And also what the baud rate, data, and parity should be

21:14 <andrewb1999> Running the bram_test/bram_test_36.v currently just prints out garbage, which is most likely a baud rate issue, but I also haven't been able to find the expected output on hardware.

21:15 <litghost> What clock are you using for bram_test?

21:16 <litghost> The baudrate for bram_test is frequency / (COUNTER*OVERSAMPLE)

21:16 <litghost> So for a 100 MHz clock, with COUNTER = 25 and OVERSAMPLE = 8, it yields a 500 kbps baudrate, with no error

21:17 <litghost> I believe the UART should otherwise be 8N1

21:18 <andrewb1999> I believe I'm using the 100 MHz clock

21:19 <andrewb1999> I'm just using the arty-uart harness

21:19 <andrewb1999> Which I think just passed the 100 MHz clock into the roi

21:19 <andrewb1999> By not error, do you mean the test shouldn't print anything?

21:20 <andrewb1999> With 500 kbps baudrate I get a bunch of lines starting with L and then random characters

21:24 <_whitenotifier-b> [symbiflow-arch-defs] HackerFoo opened issue #1608: Add an install target for the 200t - https://git.io/JJWgU

23:58 <mithro> http://reveng.sourceforge.net/

23:59 <mithro> CRC RevEng is a portable, arbitrary-precision CRC calculator and algorithm finder. It calculates CRCs using any of the 107 preset algorithms, or a user-specified algorithm to any width. It calculates reversed CRCs to give the bit pattern that produces a desired forward CRC. CRC RevEng also reverse-engineers any CRC algorithm from sufficient correctly formatted message-CRC pairs and optional known parameters. It

23:59 <mithro> comprises powerful input interpretation options. Compliant with Ross Williams' Rocksoft™ model of parametrised CRC algorithms.