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<
sf-slack >
<kgugala> @tnt LUT4 mapping to a single C_FRAG and logic_cell_macro packing as one logic block have been added (I think those are included in release 1.1.0)
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tpb >
Title: GitHub - ymherklotz/vericert: A formally verified high-level synthesis tool based on CompCert and written in Coq. (at github.com)
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<
_whitenotifier-b >
[symbiflow-arch-defs] andrewb1999 opened issue #1614: Support RW ports on BRAMs -
https://git.io/JJ4Rb
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<
mithro >
As nobody seemed to object, I pushed the new prjxray-db
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<
_whitenotifier-b >
[sphinx_symbiflow_theme] mithro opened issue #31: Render footnotes in a nicer manner -
https://git.io/JJ4PC
22:40
<
_whitenotifier-b >
[symbiflow-bitstream-viewer] benglines opened issue #9: Predefined Part Name in Makefile -
https://git.io/JJ41Q
22:47
<
_whitenotifier-b >
[sv-tests] mithro opened issue #957: Still can't easily get to tested projects... -
https://git.io/JJ4MK
22:51
<
_whitenotifier-b >
[sv-tests] mithro opened issue #958: Auto-generate a "Language Support" page like slang's for each tool -
https://git.io/JJ4M9
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<
_whitenotifier-b >
[sv-tests] mithro opened issue #959: Cross-check functionality in sv-tests against slang's "Language Support" page -
https://git.io/JJ4DN