<emeb>
tnt: when I built the riscv gcc toolchains there were 4 different ones created riscv32 [i, ic, im, icm] - which is the right one to use?
<emeb>
hmm... your makefile asks for riscv-none-embed with -march=rv32i so I assume that's not the same toolchain as clifford originally was using for his picoRV32 stuff which was all based on the riscv32-unknown-elf stuff
<emeb>
I'll try just changing $(CROSS) to point to my riscv32i stuff
<emeb>
seems to have built. loaded the bitstream and firmware into the flash and the thing configures OK
<emeb>
what's the uart baudrate?
<emeb>
ah - 1Mbps
<emeb>
works
<emeb>
getting the Command prompt
<emeb>
ok - "r" command starts USB and I get enumeration on my PC
<emeb>
so - seems your stuff works on my board
<emeb>
lots of [!] Got SETUP while busy !?? - I assume that's just because it's not fully finished.
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<tpb>
Title: Bus 001 Device 005: ID 1d50:e1e1 OpenMoko, Inc. Device Descriptor: bLength - Pastebin.com (at pastebin.com)
<emeb_mac>
no err at top, but errs at bottom now
<tnt>
Yeah those are 'expected'. It just doesn't support those features (and that's perfectly fine according to specs, they are not mandatory).
<tnt>
Nice. Now just need to implement DFU to make it do something useful :p
<emeb_mac>
sweet - nice to see that it's working. Also nice confirmation that my board supports USB.
<tnt>
yup.
<emeb_mac>
it's all just software now - easy. :P
<tnt>
Well ... I need an SPI controller.
<tnt>
But I think I'll use the hard IP for this.
<tnt>
The hard IP interface is wishbone like, so it's pretty easy to connec to the picrorv32.
<emeb_mac>
Sounds fun - I've never heard of anyone actually using those hard IP SPI / I2C cores
<emeb_mac>
is that because the current SPI flash interface is read-only?
<tnt>
yeah and it's not even accessible by the picorv32. Basically once the pll locks, a small state machine copies 32k of the flash to one one the SPRAM block, then releases the reset of the picrorv32 and it boots from that SPRAM.
<emeb_mac>
ah, ok - I hadn't studied it.
<tnt>
I'm wondering if plugging my hdmi video core into the 6502 would be doable.
<emeb_mac>
that'd be interesting
<tnt>
Probably need some 'paging' mechanism because (1) it expects a 16 bits data bus, (2) it has a 48k address space :p
<emeb_mac>
a bit of glue - easy to add
<emeb_mac>
bedtime - gn
<tnt>
gn
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<somlo>
daveshah: can you rebase PR 219 to the new nextpnr master? (getting a merge conflict in common/placer1.cc)
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<emeb>
tnt: looking at the SB_SPI documentation from Lattice - cute how they don't actually provide a register map for it.
<emeb>
(until you go to the 3rd level "advanced" document)
<emeb>
Was thinking of hooking that up to the 6502 - would require building a wishbone master for the 6502 and using the RDY line to stall the CPU during the transaction.
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<tnt>
emeb: you can also consider a non-transparent bridge.
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<janrinze>
daveshah: does the recent changes in nextpnr mean that inout can be used on pins now without specific SB_IO stuff?
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