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<janrinze>
ZipCPU: Apparently it's not possible to read the flash chip from the up5k on the upduino v2. attaching an extra flash chip to gpio worked, can be read.
<ZipCPU>
Wierd. Never would've expected that.
<janrinze>
ZipCPU: i mean the up5k cannot read the flash chip on the upduino v2 board
<janrinze>
yup.. very strange..
<ZipCPU>
Still ... wouldn't have expected it ... at all
<janrinze>
possibly the ftdi chip holds one of the pins
<ZipCPU>
Indeed, I find that kind of surprising. Disappointing too.
<ZipCPU>
You should be able to see any FTDI interference on the schematic
<janrinze>
true, i have a bootloader that cpoies flash to spram. works on the eval board but not on the upduino.
<janrinze>
*copies
<ZipCPU>
Are you working with a CPU? Which one?
<ZipCPU>
(You had mentioned "bootloader" ....)
<ZipCPU>
(I guess "bootloader" could also mean an FPGA configuration that loads another configuration ....)
<janrinze>
yes, i have a 16 bit RISC. Designed it long time ago but now runs on up5k too
<ZipCPU>
So ... if you can't use the flash, how will you load it?
<janrinze>
thinking about modifying the bootloader to load from spi SDcard
<ZipCPU>
How much memory do you have to work with?
<janrinze>
on the eval board it properly loads the 128KB from the flash.
<janrinze>
up5k has 128KB spram.
<ZipCPU>
Ok .... that's better than the 8kB BRAM on the *x8ks
<janrinze>
unfortunately it's not possible to initialize it
<janrinze>
8kB? i thought it was 16KB
<ZipCPU>
How will you read from the SD card without instructions?
<ZipCPU>
(It is 16kB, but .... little things here and there chip away at it, so that the best usable amount you'll end up with for a CPU is only ever 8kB)
<janrinze>
ZipCPU: exactly.. need to build a state machine for init and load the proper sectors to the memory
<ZipCPU>
Ever worked with an SD card before?
<janrinze>
in software over SPI .. 6502 :-) usually there are plenty sdcard libraries now so i never bothered re-doing it
<ZipCPU>
Sure, I get that, but the start up sequence for an SD card is rather intense
<ZipCPU>
Can I offer you an SD-card SPI simulator?
<janrinze>
true.. and just do sdcard bitbang in sw
<ZipCPU>
Looks like my own SD card S/W is way over bloated, coming in at about 64kB. I'm betting most of that is because it's using the C-library
<janrinze>
very possible.
<ZipCPU>
The "main" program itself is only about 4096kB, so that's starting to look a bit more realistic for something you might do.
<tnt>
janrinze: did you wake up the flash ?
<tnt>
janrinze: the ice40 issues a deep-sleep command to the flash after config is done by default.
<ZipCPU>
tnt: You'd think iceprog would know about that and wake it up thoguh
<ZipCPU>
*though
<tnt>
oh, when I read "s not possible to read the flash chip from the up5k", I thought it was about a spi core inside the fabric of the fpga once configured ... to initialize SPRAM for instance.
<tnt>
not anything to do with iceprog
<ZipCPU>
tnt: That was my first thought as well
<janrinze>
tnt: reading from the flash chip by the up5k might be hampered if deep sleep is issued.
<tnt>
well yeah ... it doesn't work ...
<tnt>
(unless the flash chip doesn't implement deepsleep)
<janrinze>
tnt: still does not explain why the eval board has no trouble to read from the flash
<tnt>
as I just said ... maybe the flash chip there doesn't implement deep sleep
<janrinze>
tnt: okay.. so what's a quick test here?
<tnt>
when converting from .asc to .bin with icepack you can use the -s option
<janrinze>
tnt: the flash chips are different on the two boards
<tnt>
this disables the final deep-sleep commands.
<janrinze>
tnt: Duh!.. works!
<janrinze>
tnt: silly me.. never thought of that..
<ZipCPU>
Wow ... that makes things *much* easier, now, doesn't it? Thanks, tnt!
<janrinze>
So in simple terms, different flash chip that DOES support deep sleep. Nice.
<ZipCPU>
See ... that's the hard part about building any "universal" QSPI flash support ... the standard is anything bug
<ZipCPU>
*but
<janrinze>
tnt: super!! thanks! this has been bugging me for days.
<tnt>
janrinze: yeah, I got bit by that too ... I had to dig up the logic analyzer to see wtf was going on to finally find out that the deep sleep command was being issued :p
<janrinze>
ZipCPU: the demo I am building includes a BASIC interpreter. Can do GPIO from BASIC :-) Any SDcard over SPI in BASIC? ;-)
<ZipCPU>
Don't see why not, I just don't have any examples using BASIC
<ZipCPU>
Just thinking about it ... my controller responds to 32-bit words. That might not work in a 16-bit environment very well. (The sim should still work tho)
* cr1901_modern
was the one who added the "-s" option to icepack
<cr1901_modern>
so technically, I RE'd exactly one bit in Project Icestorm :D
<cr1901_modern>
:P
<janrinze>
cr1901_modern: thanks! would not have been able to fix this issue without it.
<cr1901_modern>
Yw :). I lost an interesting amount of time to the lack of deep sleep myself in late 2017
<cr1901_modern>
Nobody needed it then, and since clifford was at a conference I just dl'd icecube and did it myself... really, I just think it's funny that I RE'd one single bit :P
<janrinze>
cr1901_modern: it's not about the amount of bits but the added functionality it gives. Very good catch!
<janrinze>
am i the only one who tries to hit tab for word completion when typing at IRC? :-)
<ZipCPU>
Maybe. I certainly don't use any word completion
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